Reconfigurable Computing: Architectures, Tools and Applications
Springer Berlin (Verlag)
9783642368110 (ISBN)
Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications.- Hardware Acceleration of Genetic Sequence Alignment.- An FPGA Acceleration for the Kd-tree Search in Photon Mapping.- SEU Resilience of DES, AES in SRAM-based FPGA.- An Architecture for IPv6 Lookup Using Parallel Index Generation Units.- Hardware Index to Set Partition Converter.- Teaching SoC Using Video Games to Improve Student Engagement.- Parameterized Design and Evaluation of Bandwidth Compressor for Floating-Point Data Streams in FPGA-based Custom Computing.- Hardware Acceleration of Matrix Multiplication Over Small Prime Finite Fields.- Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms.- Architecture for Transparent Binary Acceleration of Loops with Memory Accesses.- Parametric Optimization of Reconfigurable Designs using Machine Learning.- Fast Template-based Heterogeneous MPSoC Synthesis on FPGA.- Hierarchical and Multiple Switching NoC with Floorplan based Adaptability.- Performance Analysis And Optimization of High Density Tree-Based 3D Multilevel FPGA.
| Erscheint lt. Verlag | 9.2.2013 |
|---|---|
| Reihe/Serie | Lecture Notes in Computer Science | Theoretical Computer Science and General Issues |
| Zusatzinfo | XVI, 238 p. 104 illus. |
| Verlagsort | Berlin |
| Sprache | englisch |
| Maße | 155 x 235 mm |
| Gewicht | 393 g |
| Themenwelt | Mathematik / Informatik ► Informatik ► Netzwerke |
| Informatik ► Theorie / Studium ► Algorithmen | |
| Informatik ► Weitere Themen ► Hardware | |
| Schlagworte | Algorithm analysis and problem complexity • dynamically reconfigurable hardware • Embedded Systems • partially reconfigurable FPGAs • performance modeling • VLIW processor |
| ISBN-13 | 9783642368110 / 9783642368110 |
| Zustand | Neuware |
| Informationen gemäß Produktsicherheitsverordnung (GPSR) | |
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