VLSI Test Principles and Architectures
Morgan Kaufmann Publishers In (Verlag)
978-0-12-370597-6 (ISBN)
Laung-Terng Wang, Ph.D., is founder, chairman, and chief executive officer of SynTest Technologies, CA. He received his EE Ph.D. degree from Stanford University. A Fellow of the IEEE, he holds 18 U.S. Patents and 12 European Patents, and has co-authored/co-edited two internationally used DFT textbooks- VLSI Test Principles and Architectures (2006) and System-on-Chip Test Architectures (2007). Kwang-Ting (Tim) Cheng, Ph.D., is a Professor and Chair of the Electrical and Computer Engineering Department at the University of California, Berkeley. A Fellow of the IEEE, he has published over 300 technical papers, co-authored three books, and holds 11 U.S. Patents.
Chapter 1 – Introduction
Chapter 2 – Design for Testability
Chapter 3 – Logic and Fault Simulation
Chapter 4 – Test Generation
Chapter 5 – Logic Built-In Self-Test
Chapter 6 – Test Compression
Chapter 7 – Logic Diagnosis
Chapter 8 – Memory Testing and Built-In Self-Test
Chapter 9 – Memory Diagnosis and Built-In Self-Repair
Chapter 10 – Boundary Scan and Core-Based Testing
Chapter 11 – Analog and Mixed-Signal Testing
Chapter 12 – Test Technology Trends in the Nanometer Age
| Erscheint lt. Verlag | 14.8.2006 |
|---|---|
| Co-Autor | Khader S. Abdel-Hafez, Wen-Ben Jone |
| Verlagsort | San Francisco |
| Sprache | englisch |
| Maße | 191 x 235 mm |
| Gewicht | 1770 g |
| Themenwelt | Technik ► Elektrotechnik / Energietechnik |
| ISBN-10 | 0-12-370597-5 / 0123705975 |
| ISBN-13 | 978-0-12-370597-6 / 9780123705976 |
| Zustand | Neuware |
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