Design and Development of Efficient Energy Systems (eBook)

Suman Lata Tripathi, Dushyant Kumar Singh, Sanjeevikumar Padmanaban, P. Raja (Herausgeber)

eBook Download: EPUB

2021
John Wiley & Sons (Verlag)
978-1-119-76179-2 (ISBN)

Infos

There is not a single industry which will not be transformed by machine learning and Internet of Things (IoT). IoT and machine learning have altogether changed the technological scenario by letting the user monitor and control things based on the prediction made by machine learning algorithms. There has been substantial progress in the usage of platforms, technologies and applications that are based on these technologies. These breakthrough technologies affect not just the software perspective of the industry, but they cut across areas like smart cities, smart healthcare, smart retail, smart monitoring, control, and others. Because of these 'game changers,' governments, along with top companies around the world, are investing heavily in its research and development. Keeping pace with the latest trends, endless research, and new developments is paramount to innovate systems that are not only user-friendly but also speak to the growing needs and demands of society.

This volume is focused on saving energy at different levels of design and automation including the concept of machine learning automation and prediction modeling. It also deals with the design and analysis for IoT-enabled systems including energy saving aspects at different level of operation.

The editors and contributors also cover the fundamental concepts of IoT and machine learning, including the latest research, technological developments, and practical applications.  Valuable as a learning tool for beginners in this area as well as a daily reference for engineers and scientists working in the area of IoT and machine technology, this is a must-have for any library. 

Suman Lata Tripathi, PhD, is a professor at Lovely Professional with more than seventeen years of experience in academics. She has published more than 45 research papers in refereed journals and conferences. She has organized several workshops, summer internships, and expert lectures for students, and she has worked as a session chair, conference steering committee member, editorial board member, and reviewer for IEEE journals and conferences. She has published one edited book and currently has multiple volumes scheduled for publication, including volumes available from Wiley-Scrivener.

Dushyant Kumar Singh, is an assistant professor and Head of Embedded Systems Domain at Lovely Professional University. With a masters degree from Punjab Engineering College, University of Technology, Chandigarh, he has several years of industrial experience and more than ten years of teaching experience.

Sanjeevikumar Padmanaban, PhD, is a faculty member with the Department of Energy Technology, Aalborg University, Esbjerg, Denmark. He has almost ten years of teaching, research and industrial experience and is an associate editor on a number of international scientific refereed journals. He has published more than 300 research papers and has won numerous awards for his research and teaching.

P. Raja is currently working as an assistant professor at Lovely Professional University. His expertise is in VLSI and embedded systems. He has more than 14 years of experience with 5 years in embedded industry. He has 14 publications in UGC-approved and other reputable journals. He also has 10 patents to his credit.

Textauszug

1
Design of Low Power Junction-Less Double-Gate MOSFET

Namrata Mendiratta and Suman Lata Tripathi*

VLSI Design Laboratory, Lovely Professional University, Phagwara, Punjab, India

Abstract

The requirement of low power consumption and higher IC packing density leads the designer to explore new MOSFET architectures with low leakage current and operating voltages. Multi-gate MOSFET architectures are a promising candidate with increased gate-control over the channel region. Double-gate MOSFET is one of the advanced MOSFETs with a thin-channel region sandwiched into the top and bottom gate. The changes in the position of the top and bottom gate overlap and also have a significant effect on the electrical characteristics of transistors. The higher number of gates increases the drive current capability of the transistor with enhanced gate control that is desired for low-power and high-speed operations of digital circuit and bulk memories. The junction-less feature future improves switching characteristics of multi-gate MOSFETs with more drive current and high ION/IOFF current ratio. These prefabrication low-power design and analysis can be done on a Visual TCAD device simulator with graphical and programming interfaces that reduce fabrication cost and improve overall throughput.

Keywords: Low power, junction-less, DGMOSFET, TCAD, leakage current, etc.

1.1 Introduction

The size of semiconductor devices is being continuously reduced and has entered into the nanoscale range. Every two years the number of transistors doubles because the size of the MOSFET is reduced. Reducing the size of the MOSFET reduces the size of the channel, which causes short-channel effects and it increases the leakage current. Reduction in the size of semiconductor devices has given rise to short-channel effects (SCEs). The various SCEs are parasitic capacitances, drain field effect on channel field, degraded subthreshold region of operation, mobility degradation, hot carrier effects, etc. To overcome these effects the devices need to be engineered using different techniques like gate or channel engineering. The cause of the SCEs is when the width of the drain barrier extends into the drain and source region barrier lowering. Many MOSFET structures like DG-MOSFET, GAA (Gate-all-around) MOSFET, TG (Triple-gate) MOSFET, SOI (Silicon-on-insulator) MOSFET, double-step buried-oxide including junction-less properties have been designed to overcome SCEs [1–6].

MOSFETs are used for analog and RF applications to handle the radio frequency signals that are high in power from devices like televisions, radio transmitters, and amplifiers. MOSFETs are used for biomedical applications [7]. It is used as a biosensor to detect bio-molecules. It is useful in detecting molecules like enzymes, nucleotide, protein and antibodies. Using MOSFETs as a biosensor has benefits over other methods as it has more sensitivity, compatibility, mass production and miniaturization. MOSFET is also used to store memory. It is used in the construction of SRAM cells for storing data. MOSFETs were also adopted by NASA to detect interplanetary magnetic fields and interplanetary plasma. MOSFETs are used in digital applications for switching which prevents DC to flow supply and ground that lead to reduced power consumption and providing high input impedance.

1.2 MOSFET Performance Parameters

The MOSFET performance mainly depends on ON and OFF state conditions depending on the different applied bias voltage. The performance analysis is categorized as:

1. a) DC Analysis

   In DC analysis, subthreshold parameters are mainly calculated such as IOFF, DIBL, SS, and threshold voltage (Vth). These parameters can be defined as:

   1. i) IOFF: It is OFF-state current when the applied gate voltage (Vgs) is less than the threshold voltage (Vth).
   2. ii) Vth: It the required minimum value of the gate voltage to establish channel inversion.
   3. iii) Subthreshold Slope (SS): It is one of SCE that can be derived from the equation:
      (1.1)
   4. iv) Drain induced barrier lowering (DIBL): DIBL is another important parameter of SCE which is a measure of threshold voltage variations with the variation in drain voltage for constant drain current. It can be derived from the equation:
      (1.2)
2. b) AC analysis

   AC analysis is dependent on frequency of applied bias voltages. The important ac parameters are:

   1. i) Transistor Capacitance (Cg): There are several inherent capacitances such as gate to source, the gate to drain and gate to body capacitances. Transistor capacitances are important for desired switching behavior from OFF to ON state.
   2. ii) Transconductance (gm): It is a measure of drain current with the variation in gate voltage for constant drain current. It plays an important role to achieve high value of transistor amplifier gain. It can be derived from the equation:
      (1.3)
3. c) Electrostatic Characteristics

   There are a few other important parameters that also have significant importance of MOSFET behavior during ON/OFF state. Energy band diagram, channel potential, electric field distribution and electron-hole density are important electrostatic properties that need to be analysed while designing any MOSFET architecture.

1.3 Comparison of Existing MOSFET Architectures

Table 1.1 shows a comparison of existing MOSFET structures based on their performance and suitable applications.

1.4 Proposed Heavily Doped Junction-Less Double Gate MOSFET (AJ-DGMOSFET)

An AJ-DGMOSFET shown in Figure 1.1 has top and bottom gates arranged asymmetrically with an overlap region of 10nm. An n+ pocket region is added to the source side with heavy doping of donor atoms. p+ polysilicon is used as gate contact material with Hfas an oxide region of high-k dielectric constant. The body thickness is kept very low (6nm). The gate (Lgate) is 20 nm, with overlap region (Loverlap) of 10 nm. The body thickness (Tsilicon) is 6 nm source /drain length (Lsource = Ldrain) of 8 nm. The oxide thickness (Toxide) is 1 nm. A thin pocket region (n+ doping) is doped with 1x1022 cm-3 with channel region II doping (n+ doping) of 1x1019 cm-3. Including channel region I + and channel region II, the overall channel length becomes 30 nm.

The high doping concentration of the source drain region with heavy doping of n+ pocket region improves the ON-state current transistor. The drain region doping is slightly less than the source to achieve a low value of leakage current, therefore enhanced current ratio (ION/IOFF). Here channel length is also dependent on bias condition. In ON-state the effective channel length is equal to the length of overlap region of top and bottom gates. In OFF-state, the effective channel length is the length excluding overlap region between top and bottom gate.

Figure 1.2 shows a comparison between ON-state and OFF-state of the transistor. Different characteristics have been drawn with and without pocket region. The proposed AJ-DGMOSFET with heavily doped pocket region shows better ratio in comparison to AJ-DGMOSFET without a doped pocket region.

Table 1.1 Comparison of existing MOSFET structures.

Ref.	Existing MOSFET structure and methodology	Electrical performance and applications

[2]

Ge pockets are inserted in SOI JLT

Reduces the lattice temperature. The channel length is 20 nm.

[3]

Gate all around junctionless MOSFET with source and drain extension

The highly doped regions have also led to an increase in I-ON current magnitude by 70%.

[4]

Gate engineering using double-gate MOSFET

The sub-threshold slope is decreased by 1.61% and ON/OFF current ratio is increased by 17.08% and DIBL is decreased by 4.52%. The channel length is 20 nm.

[5]

Gate material engineering and drain/source Extensions

Improves the RF and analog performance. The figure of merit is also increased compared to the conventional double-gate junctionless MOSFET. The channel length is 100 nm.

[6]

Inducing source and drain extensions electrically

Suppresses short-channel effects for the channel length less than 50 nm and also suppresses hot electron effects.

[7]

Nanogap cavity is formed by the process of etching gate oxide in the channel from both the sides of source and drain

Detecting biomolecules such as DNA, enzymes, cells etc using dielectric modulation technique. The channel length is 100 nm.

[8]

Graded channel dual material gate junctionless (GC-DMGJL) MOSFET

The GC-DMGJL MOSFET gives high drain current and transconductance and also reduces short-channel effects. The channel length is 30 nm.

[9]

Black phosphorus is integrated with the junctionless recessed MOSFET

Structure drain current increases up to 0.3 mA. The off current reduces, improvement in subthreshold slope. The channel length is 44 nm.

[10]

Fully depleted tri material double-gate MOSFET is used

Improvement in the RF performance, linearity and analog performance compared to the DM-DG MOSFET and single material DG MOSFET. The channel length...

Produkt-Details

• Erscheint lt. Verlag: 26.3.2021
• Reihe/Serie: Artificial Intelligence and Soft Computing for Industrial Transformation
• Reihe/Serie: Artificial Intelligence and Soft Computing for Industrial Transformation
• Sprache: englisch
• Themenwelt: Informatik ► Theorie / Studium ► Künstliche Intelligenz / Robotik
• Themenwelt: Technik ► Elektrotechnik / Energietechnik
• Schlagworte: Artificial Intelligence • biofeedstocks • Biofuels • Clean Coal • Computer Science • DC • DC converters • Doubly-Fed Induction Generators • Drilling • Electrical & Electronics Engineering • Electrical Systems • Electric Vehicle • Elektrotechnik u. Elektronik • Energie • Energieeffizienz • Energy • energy efficiency • Energy Management Systems (EMS) • Energy Model Simulation • Fabrication process of Solar cell • Floating Solar Plant • Fuel cells • Gas • Geothermal Energy • Green Energy • Harris Hawks Optimization • Informatik • Intelligente Systeme u. Agenten • Intelligent Systems & Agents • internet of things • IOT • Künstliche Intelligenz • Li-ion batteries • machine learning • Microgrid • Multi-Level Inverters • nuclear energy • Oil • power grid • Power Quality • Power Systems • Process Engineering • Solar cell • Solar energy • Solar Panel • Wave energy • Wind Energy • Wind Power Generation
• ISBN-10: 1-119-76179-4 / 1119761794
• ISBN-13: 978-1-119-76179-2 / 9781119761792