Spacer Engineered FinFET Architectures

High-Performance Digital Circuit Applications

Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Pal (Autoren)

Buch | Softcover

138 Seiten

2020
CRC Press (Verlag)
978-0-367-57355-3 (ISBN)

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This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.

Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Pal

Preface

About the Authors

Chapter 1 ◾ Introduction to Nanoelectronics

Chapter 2 ◾ Tri-Gate FinFET Technology and Its Advancement

Chapter 3 ◾ Dual-k Spacer Device Architecture and Its Electrostatics

Chapter 4 ◾ Capacitive Analysis and Dual-k FinFET-Based Digital Circuit Design

Chapter 5 ◾ Design Metric Improvement of a Dual-k–Based SRAM Cell

Chapter 6 ◾ Statistical Variability and Sensitivity Analysis

INDEX

Erscheinungsdatum	01.07.2020
Verlagsort	London
Sprache	englisch
Maße	156 x 234 mm
Gewicht	260 g
Themenwelt	Technik ► Elektrotechnik / Energietechnik
ISBN-10	0-367-57355-5 / 0367573555
ISBN-13	978-0-367-57355-3 / 9780367573553
Zustand	Neuware