Switch/Router Architectures (eBook)
336 Seiten
John Wiley & Sons (Verlag)
978-1-119-48617-6 (ISBN)
This book delves into the inner workings of router and switch design in a comprehensive manner that is accessible to a broad audience. It begins by describing the role of switch/routers in a network, then moves on to the functional composition of a switch/router. A comparison of centralized versus distributed design of the architecture is also presented. The author discusses use of bus versus shared-memory for communication within a design, and also covers Quality of Service (QoS) mechanisms and configuration tools.
Written in a simple style and language to allow readers to easily understand and appreciate the material presented, Switch/Router Architectures: Shared-Bus and Shared-Memory Based Systems discusses the design of multilayer switches--starting with the basic concepts and on to the basic architectures. It describes the evolution of multilayer switch designs and highlights the major performance issues affecting each design. It addresses the need to build faster multilayer switches and examines the architectural constraints imposed by the various multilayer switch designs. The book also discusses design issues including performance, implementation complexity, and scalability to higher speeds. This resource also:
* Summarizes principles of operation and explores the most common installed routers
* Covers the design of example architectures (shared bus and memory based architectures), starting from early software based designs
* Provides case studies to enhance reader comprehension
Switch/Router Architectures: Shared-Bus and Shared-Memory Based Systems is an excellent guide for advanced undergraduate and graduate level students, as well for engineers and researchers working in the field.
JAMES AWEYA, PHD, is a Chief Research Scientist at Etisalat British Telecom Innovation Center (EBTIC) in Abu Dhabi, UAE. He has been granted 63 US patents and has published over 54 journal papers, 39 conference papers, and 43 Nortel technical reports. Dr. Aweya is a Senior Member of IEEE.
About the Author vii
Preface ix
1 Introduction to Switch/Router Architectures 1
2 Understanding Shared-Bus and Shared-Memory Switch Fabrics 17
3 Shared-Bus and Shared-Memory-Based Switch/Router Architectures 43
4 Software Requirements for Switch/Routers 61
5 Architectures with Bus-Based Switch Fabrics: Case Study-DECNIS 500/600 Multiprotocol Bridge/Router 87
6 Architectures with Bus-Based Switch Fabrics: Case Study-Fore Systems Powerhub Multilayer Switches 111
7 Architectures with Bus-Based Switch Fabrics: Case Study-Cisco Catalyst 6000 Series Switches 129
8 Architectures with Shared-Memory-Based Switch Fabrics: Case Study-Cisco Catalyst 3550 Series Switches 151
9 Architectures with Bus-Based Switch Fabrics: Case Study-Cisco Catalyst 6500 Series Switches with Supervisor Engine 32 171
10 Architectures with Shared-Memory-Based Switch Fabrics: Case Study-Cisco Catalyst 8500 CSR Series 191
11 Quality of Service Mechanisms in the Switch/Routers 213
12 Quality of Service Configuration Tools in Switch/Routers 227
13 Case Study: Quality of Service Processing in the Cisco Catalyst 6000 and 6500 Series Switches 249
Appendix A: Ethernet
Appendix B: IPv4 Packet
References
Index
| Erscheint lt. Verlag | 19.4.2018 |
|---|---|
| Reihe/Serie | IEEE Press Series on Digital & Mobile Communication | IEEE Press Series on Digital & Mobile Communication |
| Sprache | englisch |
| Themenwelt | Technik ► Elektrotechnik / Energietechnik |
| Technik ► Nachrichtentechnik | |
| Schlagworte | Computer Science • Drahtlose Kommunikation • Electrical & Electronics Engineering • Elektrotechnik u. Elektronik • Grid & Cloud Computing • Grid- u. Cloud-Computing • Informatik • Leistungselektronik • Mobile & Wireless Communications • Power Electronics |
| ISBN-10 | 1-119-48617-3 / 1119486173 |
| ISBN-13 | 978-1-119-48617-6 / 9781119486176 |
| Informationen gemäß Produktsicherheitsverordnung (GPSR) | |
| Haben Sie eine Frage zum Produkt? |
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