Multicore DSP (eBook)

From Algorithms to Real-time Implementation on the TMS320C66x SoC

Naim Dahnoun (Autor)

eBook Download: EPUB

2017
John Wiley & Sons (Verlag)
978-1-119-00385-4 (ISBN)

Infos

The only book to offer special coverage of the fundamentals of multicore DSP for implementation on the TMS320C66xx SoC 

This unique book provides readers with an understanding of the TMS320C66xx SoC as well as its constraints. It offers critical analysis of each element, which not only broadens their knowledge of the subject, but aids them in gaining a better understanding of how these elements work so well together.

Written by Texas Instruments' First DSP Educator Award winner, Naim Dahnoun, the book teaches readers how to use the development tools, take advantage of the maximum performance and functionality of this processor and have an understanding of the rich content which spans from architecture, development tools and programming models, such as OpenCL and OpenMP, to debugging tools. It also covers various multicore audio and image applications in detail.  Additionally, this one-of-a-kind book is supplemented with:

• A rich set of tested laboratory exercises and solutions
• Audio and Image processing applications source code for the Code Composer Studio (integrated development environment from Texas Instruments)
• Multiple tables and illustrations

With no other book on the market offering any coverage at all on the subject and its rich content with twenty chapters, Multicore DSP: From Algorithms to Real-time Implementation on the TMS320C66x SoC is a rare and much-needed source of information for undergraduates and postgraduates in the field that allows them to make real-time applications work in a relatively short period of time. It is also incredibly beneficial to hardware and software engineers involved in programming real-time embedded systems.

Naim Dahnoun is Reader in Teaching and Learning in Signal Processing in the Faculty of Engineering at the University of Bristol, UK.

Textauszug

Preface

Today’s many applications, such as medical, high‐end imaging, high‐performance computing and core networking, are facing increasing challenges in terms of data traffic, processing power and device‐to‐device communication. These put a high demand on the processor(s) and associated software and lead to processor manufacturers sustaining Moore’s law by introducing multicore processors. Texas Instruments, with its leading‐edge technology, introduced the multicore System‐on‐Chip (SoC) architecture family of processors to address these issues. As will be shown in this book, Texas Instruments introduced innovations at many levels, such as: powerful CPUs that support both fixed‐ and floating‐point arithmetic (instruction by instruction) that can achieve more than 40G multiplications/core, a Navigator that enables direct communication between cores and memory access that removes data movement bottlenecks, a Hyperlink interface and advanced development tools.

The challenge is not only how many cores you can put on a piece of silicon, the processing power of each core and how fast they can communicate, but also in the programming model and ease of use. Unfortunately, programming models are not developed sufficiently to handle several cores. The improvement in performance gained by the use of a multicore processor depends very much on the application and software used. C and C++, which are commonly used in embedded systems, do not support partitioning and, therefore, porting sequential code to multicore is not trivial. In this book, it will be shown this complexity is alleviated by using: OpenMP, which is an Application Programming Interface (API) that supports multiplatform shared multiprocessing programming in C, C++ and Fortran; Open Computing Language (OpenCL); or the Inter‐Processor Communication (IPC).

This book will help to innovate by making the reader understand the KeyStone SoC architectures, the development tools including debugging and various programming models with tested examples, and also help to broaden the knowledge by critically analysing each element (see Table of Contents) and understanding how these elements are working together. With the sheer number of practical examples and references provided, the reader will be able to quickly develop applications, take advantage of maximum performance and functionality of the processors, be able to easily use the tools to develop and debug applications and find the relevant references to pertinent material. Real‐time multicore audio and video applications are provided. Applications will be based on TI’s Multicore Software Development Kit (MCSDK), hand‐optimised code, OpenMP, OpenCL and IPC.

Due to the sheer amount of documentation available, some information is either referred to or reproduced to avoid discontinuity and misinterpretation.

This book is divided into 20 chapters. Chapters 1 to 15 deal with the hardware and software issues, and Chapters 16 to 20 deal with applications. Most of the concepts are backed up with laboratory experiments and demos that have been thoroughly tested.

• Chapter 1 Introduction: This introductory chapter provides the reader with general knowledge on multicore processors and their applications; gives a brief comparison between digital signal processor (DSP) SoCs, field‐programmable gate arrays (FPGAs), graphic processors and CPUs; illustrates the challenges associated with multicore; and provides an up‐to‐date TMS320 roadmap showing the evolution of TI’s DSP chips in terms of processing power.
• Chapter 2 The TMS320C66x architecture overview: This chapter comprehensively describes the TMS320C66x architecture. This includes a detailed description of the DSP CorePacs and an overview of the peripherals, and it introduces some useful instructions and an overview of the memory organisation.
• Chapter 3 Software development tools and the TMS320C6678 EVM: This chapter describes the software development tools that are required for testing the applications used in this book. It provides a step‐by‐step guide to the installation and use of the Code Composer Studio (CCS).
• Chapter 4 Numerical issues: This chapter explains how fixed and floating points are represented and how to handle binary arithmetic. It provides examples showing how to display various data formats using the CCS.
• Chapter 5 Software optimisation: This chapter discusses the different levels of optimisation for multicore and shows how code can be optimised for a DSP core. This chapter also shows how to use intrinsics and interface C language with intrinsics and assembly code. Multiple examples showing how to optimise code by hand and using the tools are provided.
• Chapter 6 The TMS320C66x interrupts: This chapter shows how the interrupt controller events and the Chip‐level Interrupt Controller work and how to program them to respond to events. The examples given use the general‐purpose input–output (GPIO) pins to provide the interrupts.
• Chapter 7 Real‐time operating system: TI‐RTOS: This chapter is divided into three main sections: (1) a real‐time scheduler that is composed of the hardware and software interrupts, the task, the idle, clock and timer functions, synchronisation and events; (2) dynamic memory management; and (3) laboratory experiments.
• Chapter 8 Enhanced Direct Memory Access (EDMA3) Controller: This chapter describes in detail the operation of the EDMA and provides examples with simple transfer, chaining transfer and linked transfer.
• Chapter 9 Inter‐Processor Communication (IPC): This chapter explains the need for IPC and describes the notify module, the messageQ, the ListMP module, the Multi‐processor Memory Allocation, the transport mechanism and laboratory examples.
• Chapter 10 Single and multicore debugging: This chapter introduces the need for debugging and describes the debug architecture that includes trace, Advanced Event Triggering and the Unified Breakpoint Manager. This chapter also describes the Unified Instrumentation Architecture, debugging with the System Analyzer tools, instrumentation with TI‐RTOS and CCS and laboratory experiments.
• Chapter 11 Bootloader for Keystone I and Keystone II: This chapter introduces the boot process for both the KeyStone I and KeyStone II, and provides laboratory experiments for both devices.
• Chapter 12 Introduction to OpenMP: This chapter introduces the concept behind OpenMP and divides the content into three main sections: (1) work sharing, (2) data sharing and (3) synchronisation. Various examples with both KeyStone I and II are provided. For the KeyStone II, an example is implemented with OpenMP with the accelerator model.
• Chapter 13 Introduction to OpenCL for the KeyStone II: In this chapter, another programming model called Open Computing Language (OpenCL) is introduced. This chapter will emphasise the OpenCL for the KeyStone rather than other devices. This chapter will show that OpenCL is easy to use since the programmer does not need to deal with details of communication between DSP cores or between the ARM and the DSP, which may be a daunting task.
• Chapter 14 Multicore Navigator: This chapter shows how the Multicore Navigator can provide a high‐speed packed data transfer to enhance CorePac to accelerator/peripheral data movements, core‐to‐core data movements, inter‐core communication and synchronisation without loading the CorePacs. Examples are also provided.
• Chapter 15 FIR filter implementation: The purpose of this chapter is twofold. Primarily, it shows how to design an FIR filter and implement it on the TMS320C66x processor; and, secondly, it shows how to optimise the code as discussed in Chapter 3. This chapter discusses the interface between C and assembly, how to use intrinsics, and how to put into practice material that has been covered in the previous chapters.
• Chapter 16 IIR filter implementation: This chapter introduces the IIR filters and describes two popular design methods: the bilinear and the impulse invariant methods. Step by step, this chapter shows the procedures necessary to implement typical IIR filters specified by their transfer functions. Finally, this chapter provides complete implementation of an IIR filter in C language, assembly and linear assembly, and shows how to interface C with linear assembly.
• Chapter 17 Adaptive filter implementation: This chapter starts by introducing the need for an adaptive filter in communications. It then shows how to calculate the filter coefficients using the mean squared error (MSE) criterion, exposes the least mean squares (LMS) algorithm and, finally, shows how the LMS algorithm is implemented in both C and assembly.
• Chapter 18 FFT implementation: This chapter shows a derivation of an FFT algorithm and shows its implementation in C language. To improve the performance, the ping‐pong EDMA has been used.
• Chapter 19 Hough transform: This chapter shows the basic mathematics behind the Hough transform for detecting straight lines and how to implement it. This chapter also shows how to increase the performance by looking at the algorithm and minimising the number of operations required, and how to use the graphical display using the Code Composer Studio.
• Chapter 20 Stereo vision implementation: This chapter shows the principle behind the stereo vision system and highlights different...

Produkt-Details

• Erscheint lt. Verlag: 30.11.2017
• Sprache: englisch
• Themenwelt: Technik ► Elektrotechnik / Energietechnik
• Themenwelt: Technik ► Nachrichtentechnik
• Schlagworte: Computer Algorithms • computer programming • DSP • DSPs • Electrical & Electronics Engineering • Elektrotechnik u. Elektronik • Embedded Systems • Embedded Systems & Smart Cards • Embedded Systems u. Smart Cards • Hardware Engineering • High-Performance Computing • Inter-Processor Communication • IPC • Multicore digital signal processors • Multicore DSP: From Algorithms to Real-time Implementation on the TMS320C66x SoC • multicore platforms • Naim Dahnoun • OpenCL • OpenMP • Signal Processing • Signalverarbeitung • SoC • Software engineering • Texas Instruments • TMS320C66x • VLSI
• ISBN-10: 1-119-00385-7 / 1119003857
• ISBN-13: 978-1-119-00385-4 / 9781119003854