Low Power Interconnect Design (eBook)

Sandeep Saini (Autor)

eBook Download: PDF

2015 | 2015
XVII, 152 Seiten
Springer New York (Verlag)
978-1-4614-1323-3 (ISBN)

Infos

This book provides practical solutions for delay and power reduction for on-chip interconnects and buses.  It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the total system.  Coverage focuses on use of the Schmitt Trigger as an alternative approach to buffer insertion for delay and power reduction in VLSI interconnects. In the last section of the book, various bus coding techniques are discussed to minimize delay and power in address and data buses.

Inhalt

Part I Basics of Interconnect Design.- Introduction to Interconnects.- CMOS Buffer.- Part II Buffer and Schmidt trigger Insertion Techniques for Low Power Interconnect Design.- Buffer Insertion as a Solution to Interconnect Issues.- Schmidt Trigger Approach.- Part III Bus Coding Techniques for Low Power Interconnect Design.- Bus Coding Techniques.

Produkt-Details

• Erscheint lt. Verlag: 12.6.2015
• Zusatzinfo: XVII, 152 p. 111 illus., 12 illus. in color.
• Verlagsort: New York
• Sprache: englisch
• Themenwelt: Mathematik / Informatik ► Informatik ► Theorie / Studium
• Themenwelt: Technik ► Elektrotechnik / Energietechnik
• Schlagworte: Embedded Systems • Integrated Circuit Design • Interconnect Buffer Insertion • Network on Chip • On-Chip Interconnect • Schmitt Trigger
• ISBN-10: 1-4614-1323-0 / 1461413230
• ISBN-13: 978-1-4614-1323-3 / 9781461413233