Emerging Nanoelectronic Devices (eBook)
576 Seiten
Wiley (Verlag)
978-1-118-95827-8 (ISBN)
Emerging Nanoelectronic Devices focuses on the future direction of semiconductor and emerging nanoscale device technology. As the dimensional scaling of CMOS approaches its limits, alternate information processing devices and microarchitectures are being explored to sustain increasing functionality at decreasing cost into the indefinite future. This is driving new paradigms of information processing enabled by innovative new devices, circuits, and architectures, necessary to support an increasingly interconnected world through a rapidly evolving internet. This original title provides a fresh perspective on emerging research devices in 26 up to date chapters written by the leading researchers in their respective areas. It supplements and extends the work performed by the Emerging Research Devices working group of the International Technology Roadmap for Semiconductors (ITRS).
Key features:
- Serves as an authoritative tutorial on innovative devices and architectures that populate the dynamic world of “Beyond CMOS” technologies.
- Provides a realistic assessment of the strengths, weaknesses and key unknowns associated with each technology.
- Suggests guidelines for the directions of future development of each technology.
- Emphasizes physical concepts over mathematical development.
- Provides an essential resource for students, researchers and practicing engineers.
An Chen is with GLOBALFOUNDRIES, working on emerging logic and memory technologies. He is the Memory Technology Lead responsible for exploratory memory research with industrial consortia including IMEC and Sematech. His memory research focuses primarily on RRAM and STTRAM. Prior to GLOBALFOUNDRIES, he worked at Spansion LLC on emerging memory research and at Advanced Micro Devices (AMD) on nanoelectronics. He is currently chairing the Emerging Research Device (ERD) working group in the International Technology Roadmap of Semiconductors (ITRS). He is also a Senior Member of the IEEE.
James Hutchby, Senior Scientist, Emeritus, was formerly Director of Device Sciences of Semiconductor Research Corporation (SRC). Prior to joining SRC he was founding Director of the Research Triangle Institute’s Center for Semiconductor Research, which consisted of five research groups performing research on: low-temperature growth of diamond; high efficiency multi-bandgap solar cells; complementary HBT devices and integrated circuits and high efficiency thermoelectrics and theremovoltaics. Dr Hutchby has authored or co-authored over 160 contributed and invited papers. He is also a Life Fellow of the IEEE and a recipient of the IEEE Third Millennium Medal.
Victor Zhirnov is Director of Special Projects at the SRC. His research interests include nanoelectronics devices and systems, properties of materials at the nanoscale and bio-inspired electronic systems. He also holds an adjunct faculty position at North Carolina State University and has served as an advisor to a number of government, industrial, and academic institutions. Victor Zhirnov has authored and co-authored over 100 technical papers and contributions to books.
George Bourianoff is a Senior Principle Engineer in the Components Research group at Intel. He is responsible for developing and managing research programs in emerging research technologies and architectures. He also serves on the scientific advisory boards of the Nanoelectronic Research Initiative (NRI) and the Semiconductor Technology Advanced Research Network. (STARnet). Prior to joining Intel in 1994 Dr Bourianoff was a group leader in the Superconducting Supercollidier Project in Texas responsible for accelerator simulation. Prior to that, he was a Senior Scientist with SAIC responsible for Magneto Hydrodynamic code development.
An Chen is with GLOBALFOUNDRIES, working on emerging logic and memory technologies. He is the Memory Technology Lead responsible for exploratory memory research with industrial consortia including IMEC and Sematech. His memory research focuses primarily on RRAM and STTRAM. Prior to GLOBALFOUNDRIES, he worked at Spansion LLC on emerging memory research and at Advanced Micro Devices (AMD) on nanoelectronics. He is currently chairing the Emerging Research Device (ERD) working group in the International Technology Roadmap of Semiconductors (ITRS). He is also a Senior Member of the IEEE. James Hutchby, Senior Scientist, Emeritus, was formerly Director of Device Sciences of Semiconductor Research Corporation (SRC). Prior to joining SRC he was founding Director of the Research Triangle Institute's Center for Semiconductor Research, which consisted of five research groups performing research on: low-temperature growth of diamond; high efficiency multi-bandgap solar cells; complementary HBT devices and integrated circuits and high efficiency thermoelectrics and theremovoltaics. Dr Hutchby has authored or co-authored over 160 contributed and invited papers. He is also a Life Fellow of the IEEE and a recipient of the IEEE Third Millennium Medal. Victor Zhirnov is Director of Special Projects at the SRC. His research interests include nanoelectronics devices and systems, properties of materials at the nanoscale and bio-inspired electronic systems. He also holds an adjunct faculty position at North Carolina State University and has served as an advisor to a number of government, industrial, and academic institutions. Victor Zhirnov has authored and co-authored over 100 technical papers and contributions to books. George Bourianoff is a Senior Principle Engineer in the Components Research group at Intel. He is responsible for developing and managing research programs in emerging research technologies and architectures. He also serves on the scientific advisory boards of the Nanoelectronic Research Initiative (NRI) and the Semiconductor Technology Advanced Research Network. (STARnet). Prior to joining Intel in 1994 Dr Bourianoff was a group leader in the Superconducting Supercollidier Project in Texas responsible for accelerator simulation. Prior to that, he was a Senior Scientist with SAIC responsible for Magneto Hydrodynamic code development.
Acronyms
| 1D1R | 1-Diode-1-resistor |
| 1S1R | 1-Selector-1-resistor |
| 1T | One transistor |
| 1T1C | 1-Transistor-1-capacitor |
| 1T1R | 1-Transistor-1-resistor |
| 2DEG | Two-dimensional electron gas |
| 3D | Three dimensional |
| AD | Analog digital |
| AF | Anti-ferromagnetic |
| AIST | Silver (Ag) Indium (In) Antimony (Sb) Tellurium (Te) |
| ALD | Atomic layer deposition |
| AM | Associative memory |
| ASIC | Application specific integrated circuit |
| ASL | All-spin logic |
| BARITT diode | Barrier-injection transit-time diode |
| BBE | Brain, body, environment based interactions |
| BBL | Buried bit line |
| BDA | 1,4-Benzenediamine |
| BDC60 | Bis(fullero[c]pyrolidin-1y1)benzene |
| BDT | 1,4-Benzenedithiol |
| BE | Bottom electrode |
| BEC | Bottom electrode contact |
| BEOL | Back end of line |
| BFO | Bismuth ferrite (BiFeO3) |
| BiSFET | Bilayer pseudo-spin field-effect transistor |
| BIST | Built-in self-test |
| BJT | Bipolar junction transistor |
| BL | Bit line |
| BLG | Bilayer graphene |
| BN | Beyond Neumann |
| CA | Cellular automata |
| CAM | Contend addressable memory |
| CBL | Cantilever bit line |
| CBRAM | Conductive-bridge random access memory |
| CDMA | Code division multiple access |
| CMIS | Current-induced magnetization switching |
| CMOS | Complementary metal oxide semiconductor |
| CNT | Carbon nanotube |
| CNTFET | Carbon nanotube field-effect transistor |
| CO | Carbon monoxide |
| CoFeB | Cobalt iron boron |
| CoPt | Cobalt platinum |
| CP-AFM | Conducting probe–atomic force microscopy |
| CPP | Current perpendicular to plane |
| CPU | Central processing unit |
| CRS | Complementary resistive switch |
| CTAFM | Conductive-tip atomic force microscopy |
| D | Density of states |
| DC | Direct contact |
| DC8 to DC12 | Eight to 12 carbon atoms in alkanedithiols |
| dCNT | Carbon nanotube diameter |
| DFT | Density functional theory |
| DIBL | Drain induced barrier lowering |
| DMRG method | Density matrix renormalization group method |
| DNA | Deoxyribonucleic acid |
| DoM | Degree of match |
| DOS | Density of states |
| DRAM | Dynamic random access memory |
| DVD | Digital versatile disc |
| e | Elementary charge of an electron |
| EBIC | Electron beam induced current |
| EBJs | Electromigrated break junctions |
| EEPROM | Electrically erasable programmable read only memory |
| Eg | Energy bandgap |
| EM | Electromechanical |
| EMB | Electrochemical metallization bridge |
| EOT | Equivalent oxide thickness |
| ERD | Emerging research devices |
| FD | Fully depleted |
| FeFET | Ferroelectric field effect transistor |
| Fe-NAND | Ferroelectric NAND |
| FeRAM | Ferroelectric random access memory |
| FERET | Facial recognition technology |
| FET | Field-effect transistor |
| FIB | Focused ion beam |
| FinFET | Multi-gate MOSFET with fin-shaped active structure |
| FL | Free layer |
| FM | Ferromagnetic |
| FN | Fowler–Nordheim |
| FOPE | Fluorinated oligomer |
| FPGA | Field programmable gate array |
| FRAM | Ferroelectric random access memory |
| FTJ | Ferroelectric tunnel junction |
| FWHM | Full width at half maximum |
| GAA | Gate all around |
| GaAs | Gallium arsenide |
| GMR | Giant magnetoresistive |
| GNM | Graphene nanomesh |
| GNR | Graphene nanoribbon |
| GQ | Quantum conductance |
| GSHE | Giant spin Hall effect |
| GST | Germanium (Ge), Antimony(Sb), Tellurium(Te) |
| h | Planck's constant |
| HAO | Hf-Al-O |
| HDD | Hard disk drive |
| HEMT | High electron mobility transistor |
| HF | Hydrofluoric acid |
| HKMG | High-k metal gate |
| HMAX | Hierarchical memory and X |
| HOMO | Highest occupied molecular orbital |
| HP | High performance |
| HRS | High resistance state |
| HTM | Hierarchical temporal memory |
| IC | Integrated circuit |
| ICT | Information and communication technologies |
| IEDM | International Electron Devices Meeting |
| IETS | Inelastic electron tunneling spectroscopy |
| I-MOS | Impact-ionization MOS |
| InAlAs | Indium aluminum arsenide |
| InAs | Indium arsenide |
| InGaAs | Indium gallium arsenide |
| iNML | In-plane nanomagnet logic |
| InP | Indium phosphide |
| InSb | Indium antimonide |
| Ioff | Off current |
| Ion | On current |
| IOP | Input–output processor |
| IPCM | Interfacial phase change memory |
| ITRS | International Technology Roadmap for Semiconductors |
| KJMA | Kolmogorov, Johnson and Mehl, and Avrami |
| Lch | Channel length |
| LEC | Lyric error correction |
| Lg | Gate length |
| LLG | Landau–Lifshitz–Gilbert |
| LRS | Low resistance state |
| Lspr | Spacer length |
| LtN | Less than Neumann |
| LUMO | Lowest unoccupied molecular orbital |
| m | Carrier effective mass |
| MC | Magneto current ratio |
| MCBJs | Mechanically controllable break junctions |
| MEMS | Micro-electro-mechanical systems |
| MFIS | Metal... |
| Erscheint lt. Verlag | 26.11.2014 |
|---|---|
| Sprache | englisch |
| Themenwelt | Technik ► Elektrotechnik / Energietechnik |
| Schlagworte | Beyond CMOS • Carbon electronics • Circuit Theory & Design / VLSI / ULSI • Electrical & Electronics Engineering • Electronic materials • Elektronische Materialien • Elektrotechnik u. Elektronik • emerging architectures • Emerging logic • Emerging Memory • MEMS • nanoelectronics • Schaltkreise - Theorie u. Entwurf / VLSI / ULSI • Spintronics |
| ISBN-10 | 1-118-95827-6 / 1118958276 |
| ISBN-13 | 978-1-118-95827-8 / 9781118958278 |
| Informationen gemäß Produktsicherheitsverordnung (GPSR) | |
| Haben Sie eine Frage zum Produkt? |
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