Design and Architecture for Signal and Image Processing
Springer International Publishing (Verlag)
978-3-031-87896-1 (ISBN)
This book constitutes the refereed conference proceedings of the 18th International Workshop on Design and Architecture for Signal and Image Processing, DASIP 2025, held in Barcelona, Spain, during January 20-22, 2025.
The 10 full papers included in this book were carefully reviewed and selected from 23 submissions.They were organized in topical sections as follows: Specialized Hardware Architecture for Efficient Processing; Efficient Processing using AI for Image, Vision and Signal Applications, and Analysis of Emerging Techniques for Signal Processing Applications.
.- Specialized Hardware Architecture for Efficient Processing.
.- CSD-Driven Speedup in RISC-V Processor.
.- Efficient FPGA implementation of ViT Non-Linear Functions.
.- LiFT: Lightweight,FPGA-tailored 3D object detection based on LIDAR data.
.- Efficient Processing using AI for Image, Vision and Signal Applications.
.- A practical HW-Aware NAS flow for AI vision applications on embedded heterogeneous SoCs.
.- Endoscopy image classification for wireless cpasules with CNNs on microcontroller-based platforms.
.- Joint Underwater Depth Estimation and Dehazing from Single Image using Attention U-Net.
.- KD-AHOSVD: Neural Network Compression via Knowledge Distillation and Tensor Decomposition.
.- Analysis of Emerging Techniques for Signal Processing Applications.
.- Novel scheduling and shifter networks for 5G LDPC decoders.
.- Comparison Between In-core Hardware IDS, Off-core Hardware IDS and Software IDS.
.- Comparative Study of Memory Optimization Techniques for Dataflow-modeled Applications.
| Erscheinungsdatum | 03.04.2025 |
|---|---|
| Reihe/Serie | Lecture Notes in Computer Science |
| Zusatzinfo | XVI, 133 p. 59 illus., 53 illus. in color. |
| Verlagsort | Cham |
| Sprache | englisch |
| Maße | 155 x 235 mm |
| Themenwelt | Informatik ► Theorie / Studium ► Künstliche Intelligenz / Robotik |
| Technik ► Elektrotechnik / Energietechnik | |
| Schlagworte | Architectures • Artificial Intelligence • Communication hardware interfaces and storage • Communication hardware interfaces and storage • cross-computing tools and techniques • design and analysis of algorithms • Distributed computing methodology • Electronic Design Automation • embedded and cyber-physical systems • Emerging Technologies • Hardware Test • machine learning • Modeling and Simulation • Modeling and Simulation • Network components • parallel computing methodology • real-time systems • Real-Time Systems • security in hardware • Theory and algorithms for application domains • very large scale integration design |
| ISBN-10 | 3-031-87896-5 / 3031878965 |
| ISBN-13 | 978-3-031-87896-1 / 9783031878961 |
| Zustand | Neuware |
| Informationen gemäß Produktsicherheitsverordnung (GPSR) | |
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