FPGA Prototyping by SystemVerilog Examples (eBook)
John Wiley & Sons (Verlag)
978-1-119-28270-9 (ISBN)
A hands-on introduction to FPGA prototyping and SoC design
This is the successor edition of the popular FPGA Prototyping by Verilog Examples text. It follows the same 'learning-by-doing' approach to teach the fundamentals and practices of HDL synthesis and FPGA prototyping. The new edition uses a coherent series of examples to demonstrate the process to develop sophisticated digital circuits and IP (intellectual property) cores, integrate them into an SoC (system on a chip) framework, realize the system on an FPGA prototyping board, and verify the hardware and software operation. The examples start with simple gate-level circuits, progress gradually through the RT (register transfer) level modules, and lead to a functional embedded system with custom I/O peripherals and hardware accelerators. Although it is an introductory text, the examples are developed in a rigorous manner, and the derivations follow the strict design guidelines and coding practices used for large, complex digital systems.
The book is completely updated and uses the SystemVerilog language, which 'absorbs' the Verilog language. It presents the hardware design in the SoC context and introduces the hardware-software co-design concept. Instead of treating examples as isolated entities, the book integrates them into a single coherent SoC platform that allows readers to explore both hardware and software 'programmability' and develop complex and interesting embedded system projects. The new edition:
- Adds four general-purpose IP cores, which are multi-channel PWM (pulse width modulation) controller, I2C controller, SPI controller, and XADC (Xilinx analog-to-digital converter) controller.
- Introduces a music synthesizer constructed with a DDFS (direct digital frequency synthesis) module and an ADSR (attack-decay-sustain-release) envelope generator.
- Expands the original video controller into a complete stream based video subsystem that incorporates a video synchronization circuit, a test-pattern generator, an OSD (on-screen display) controller, a sprite generator, and a frame buffer.
- Provides a detailed discussion on blocking and nonblocking statements and coding styles.
- Describes basic concepts of software-hardware co-design with Xilinx MicroBlaze MCS soft-core processor.
- Provides an overview of bus interconnect and interface circuit.
- Presents basic embedded system software development.
- Suggests additional modules and peripherals for interesting and challenging projects.
FPGA Prototyping by SystemVerilog Examples makes a natural companion text for introductory and advanced digital design courses and embedded system courses. It also serves as an ideal self-teaching guide for practicing engineers who wish to learn more about this emerging area of interest.
PONG P. CHU, PhD is an Associate Professor in the Department of Electrical Engineering and Computer Science at Cleveland State University, Cleveland, Ohio. He has taught undergraduate and graduate digital systems and computer architecture courses for more than two decades, and has received multiple instructional grants from the National Science Foundation.
PONG P. CHU, PhD is an Associate Professor in the Department of Electrical Engineering and Computer Science at Cleveland State University, Cleveland, Ohio. He has taught undergraduate and graduate digital systems and computer architecture courses for more than two decades, and has received multiple instructional grants from the National Science Foundation.
Preface
Acknowledgements
PART I BASIC DIGITAL CIRCUITS DEVELOPMENT
1 Gate-level Combinational Circuit
2 Overview of FPGA and EDA software
3 RT-level Combinational Circuit
4 Regular Sequential Circuit
5 FSM
6 FSMD
7 RAM and Buffer of FPGA
8 Selected Topics of SystemVerilog
PART II EMBEDDED SOC I: VANILLA FPRO SYSTEM
9 Overview of Embedded SoC Systems
10 Bare Metal System Software Development
11 FPro Bus Protocol and MMIO Slot Specification
12 UART Core
PART III EMBEDDED SOC II: BASIC I/O CORES
13 Xilinx XADC Core
14 Pulse Width Modulation Core
15 Debouncing core and LED-Mux Core
16 SPI Core
17 I2C Core
18 PS2 Core
19 Sound I: DDFS Core
20 Sound II: ADSR Core
PART IV EMBEDDED SOC III: VIDEO CORES
21 Introduction to the Video System
22 FPro Video Subsystem
23 Sprite Core
24 On-Screen-Display Core
25 VGA Frame Buffer Core
PART V EPILOGUE
26 What's Next
References
Appendix A: Tutorials
Topic Index
PREFACE
HDL (hardware description language) and FPGA (field-programmable gate array) devices allow designers to quickly develop and simulate a sophisticated digital circuit, realize it on a prototyping device, and verify operation of the physical implementation. As the capacity of FPGA devices continues to grow, a device can accommodate an SoC (system on a chip) design, which integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single chip. This book uses a “learning by doing” approach and illustrates the FPGA and HDL development and design process by a series of examples in the SoC context.
The examples start with simple gate-level circuits, progress gradually through the RT (register-transfer) level modules, and lead to a functional embedded system with custom I/O peripherals and hardware accelerators. A simple SoC framework, FPro (abbreviated from the book title “FPGA Prototyping”), is introduced as a platform to integrate all the design examples together. An FPro system contains a Xilinx MicroBlaze MCS soft-core processor, a video subsystem, and the MMIO (memory-mapped I/O) subsystem that can incorporate custom I/O cores. Except for the processor, all components are designed and coded from scratch. All the hardware and software examples can be synthesized, compiled, and physically tested on the prototyping board.
Focus and audience
Focus The primary focus of this book is on developing efficient and reliable digital systems and effectively using HDL as a tool to describe the intended hardware. The HDL language itself is not the main subject and its coverage is limited to a small synthesizable subset. The book uses about a dozen proven code templates to provide the skeletal structures of various types of circuits. These templates are general and can easily be integrated to construct a large, complex system. Although this approach limits the “freedom” of syntactic expression, it helps us steer our effort to develop an innovative and efficient hardware architecture.
After discussing the fundamentals in Part I, the book illustrates more complicated and sophisticated designs in the SoC context. Along the way, readers will learn many system-level concepts, including the derivation of a soft-core processor and IP (intellectual property) core based system, the partition and integration of software and hardware, and the development of custom I/O peripherals and hardware accelerators.
Although the book is intended for beginning designers, the examples follow strict design guidelines and prepare readers for future endeavors. The coding and design practice is “forward compatible,” by which we mean the following:
- The same practice can be applied to large designs in the future.
- The same practice can aid other system development tasks, including simulation, timing analysis, verification, and testing.
- The same practice can be applied to ASIC technology and different types of FPGA devices.
- The code can be accepted by synthesis software from different vendors.
Audience and prerequisites
The intended audience is students in an advanced digital design course as well as practicing engineers who wish to learn FPGA-and HDL-based developments. Readers need to have a basic knowledge of digital systems, usually a required course in electrical engineering and computer engineering curricula, and a working knowledge of the C/C++ language. Prior exposure to computer architecture, embedded system, and operating system is not necessary but will be helpful.
Changes for the MicroBlaze MCS SoC Edition
This book is the successor edition of FPGA Prototyping by Verilog Examples: Xilinx Spartan 3 Version. The System Verilog in the title reflects the fact that the book uses the new language constructs of SystemVerilog. The most significant change is that the new edition presents the hardware in the SoC context and covers many system-level concepts. Instead of treating each module as an isolated entity, the book integrates them into a single coherent SoC platform that allows readers to explore both hardware and software “programmability” and develop complex and interesting embedded system projects. The major revisions in this edition are the following:
- Add four general-purpose peripheral modules: multi-channel PWM (pulse width modulation), I2C controller, SPI controller, and XADC (Xilinx analog-to-digital converter) controller.
- Introduce a music synthesizer constructed with a DDFS (direct digital frequency synthesis) module and an ADSR (attack-decay-sustain-release) envelope generator.
- Expand the original video controller into a complete stream-based video subsystem that incorporates a video synchronization circuit, a test-pattern generator, an OSD (on-screen-display) controller, a sprite generator, and a frame buffer.
- Expand the coverage of timing model and provide an in-depth discussion of blocking and nonblocking statements.
- Introduce basic concepts of software-hardware co-design with Xilinx Micro-Blaze MCS soft-core processor.
- Provide an overview of the bus interconnect and interface circuit.
- Introduce basic embedded system software development.
- Suggest additional modules and peripherals for interesting and challenging projects.
Logistics
FPGA prototyping board
This book is prepared to be used with the Nexys 4 DDR FPGA prototyping board manufactured by Digilent Inc. It contains an Artix FPGA device and the needed I/O peripherals. All HDL codes and discussions of this book can be applied to this board directly. The less expensive Basys 3 board can be used as well. This board incorporates fewer I/O peripherals and contains a smaller FPGA device.
Most peripherals discussed in the book are de facto industrial standards and the corresponding HDL codes can be used for other FPGA boards as long as they provide adequate analog interface circuits and connectors. Another option is to use stand-alone I/O peripheral modules or to construct the circuits on a breadboard.
Software
The book uses the Xilinx Vivado WebPack edition for hardware development and Xilinx SDK for software development. Both software packages are free and can be downloaded from Xilinx’s website.
PC accessories
The design examples involve interfaces to several PC peripheral devices, including a USB keyboard, a USB mouse, a VGA compatible monitor, and a powered speaker. These accessories are widely available and probably can be obtained from an old PC.
Book organization
The book is divided into four major parts. Part I introduces the elementary HDL constructs and their hardware counterparts, and demonstrates the construction of a basic digital circuit with these constructs. It consists of six chapters:
- Chapter 1 describes the skeleton of an HDL program, the basic language syntax, and the logical operators. Gate-level combinational circuits are derived with these language constructs.
- Chapter 2 provides an overview of an FPGA device, prototyping board, and development flow.
- Chapter 3 introduces HDL’s relational and arithmetic operators and routing constructs. These correspond to medium-sized components, such as comparators, adders, and multiplexers. Module-level combinational circuits are derived with these language constructs.
- Chapter 4 presents the codes for memory elements and the construction of “regular” sequential circuits, such as counters and shift registers, in which the state transitions exhibit a regular pattern.
- Chapter 5 discusses the construction of a finite state machine (FSM), which is a sequential circuit whose state transitions do not exhibit a simple, regular pattern.
- Chapter 6 presents the construction of an FSM with data path (FSMD). The FSMD is used to implement the register-transfer (RT) methodology, in which the system operation is described by data transfers and manipulations among registers.
- Chapter 7 covers the methods to infer FPGA’s internal memory modules, which can then be used to construct buffers and lookup tables.
- Chapter 8 provides an in-depth coverage of the timing model and data types and discusses an alternate coding style. This chapter can be skipped without affecting the remaining chapters.
Part II introduces the hardware construction of an FPro system and the development of embedded software. A basic “vanilla” FPro system, which contains a timer core, a UART (universal asynchronous receiver and transmitter) core, a GPI (general-purpose input) core, and a GPO (general-purpose output) core, is used to illustrate the key concepts of the process. It consists of four chapters:
- Chapter 9 introduces the SoC development and provides an overview of the hardware organization and software structure of the FPro platform.
- Chapter 10 discusses the software development for an embedded system and the basic coding techniques to access low-level I/O cores.
- Chapter 11 covers the FPro bus protocol and the bus interface circuit and demonstrates the construction of basic GPI, GPO, and timer cores.
- Chapter 12 presents the construction of a more sophisticated UART core and the derivation of software device drivers.
Part III applies the techniques from Parts I...
| Erscheint lt. Verlag | 4.5.2018 |
|---|---|
| Sprache | englisch |
| Themenwelt | Mathematik / Informatik ► Informatik ► Theorie / Studium |
| Technik ► Elektrotechnik / Energietechnik | |
| Schlagworte | algorithmic state machine • ASM • Circuit Theory & Design • combinational circuits • Computer-Ratgeber • control path • data path • DDFS • Digital Design • Digital systems • direct digital frequency synthesis • Electrical & Electronics Engineering • Elektrotechnik u. Elektronik • Embedded Systems • End-User Computing • Finite State Machine • FPGA • FSM • Hardware Description Language • HDL • I2C • <p>field programmable gate array • MicroBlaze • on-screen display • OSD • Other Software (Non-Microsoft) • Prototyping • PS2 • PWM • register transfer level • RTL • Schaltkreise - Theorie u. Entwurf • Sequential Circuits • Simulation • SoC • software-hardware co-design • Sonstige Software (außer Microsoft) • SPI • Sprite • synthesis • System on chip • SystemVerilog • Verilog • video controller • XADC </p> • Xilinx |
| ISBN-10 | 1-119-28270-5 / 1119282705 |
| ISBN-13 | 978-1-119-28270-9 / 9781119282709 |
| Informationen gemäß Produktsicherheitsverordnung (GPSR) | |
| Haben Sie eine Frage zum Produkt? |
Kopierschutz: Adobe-DRM
Adobe-DRM ist ein Kopierschutz, der das eBook vor Mißbrauch schützen soll. Dabei wird das eBook bereits beim Download auf Ihre persönliche Adobe-ID autorisiert. Lesen können Sie das eBook dann nur auf den Geräten, welche ebenfalls auf Ihre Adobe-ID registriert sind.
Details zum Adobe-DRM
Dateiformat: EPUB (Electronic Publication)
EPUB ist ein offener Standard für eBooks und eignet sich besonders zur Darstellung von Belletristik und Sachbüchern. Der Fließtext wird dynamisch an die Display- und Schriftgröße angepasst. Auch für mobile Lesegeräte ist EPUB daher gut geeignet.
Systemvoraussetzungen:
PC/Mac: Mit einem PC oder Mac können Sie dieses eBook lesen. Sie benötigen eine
eReader: Dieses eBook kann mit (fast) allen eBook-Readern gelesen werden. Mit dem amazon-Kindle ist es aber nicht kompatibel.
Smartphone/Tablet: Egal ob Apple oder Android, dieses eBook können Sie lesen. Sie benötigen eine
Geräteliste und zusätzliche Hinweise
Buying eBooks from abroad
For tax law reasons we can sell eBooks just within Germany and Switzerland. Regrettably we cannot fulfill eBook-orders from other countries.
aus dem Bereich