Symbolic Parallelization of Nested Loop Programs

Alexandru-Petru Tanase, Frank Hannig, Jürgen Teich (Autoren)

Buch | Hardcover

XII, 176 Seiten

2018
Springer International Publishing (Verlag)
9783319739083 (ISBN)

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This book introduces new compilation techniques, using the polyhedron model for the resource-adaptive parallel execution of loop programs on massively parallel processor arrays. The authors show how to compute optimal symbolic assignments and parallel schedules of loop iterations at compile time, for cases where the number of available cores becomes known only at runtime. The compile/runtime symbolic parallelization approach the authors describe reduces significantly the runtime overhead, compared to dynamic or just-in-time compilation. The new, on-demand fault-tolerant loop processing approach described in this book protects loop nests for parallel execution against soft errors.

Alexandru-Petru Tanase is a researcher at the Department Of Computer Science, Friedrich Alexander University Erlangen-Nürnberg (FAU), since 2011. He defended his Phd Degree on the topic of "Symbolic Parallelization of Nested Loop Programs" in September, 2017. He received his Diploma Degree in Computer Engineering In 2006 and Master Degree in Parallel Processing in 2008 from ULBS University, Romania. His main research interests include high level synthesis, programmable hardware accelerators, the design of massively parallel architectures, mapping methodologies for domain-specific computing, and architecture/compiler co-design. Frank Hannig leads the Architecture And Compiler Design Group in the CS Department at the Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany, Since 2004. He received a Diploma Degree in an interdisciplinary course of study in EE and CS from the University of Paderborn, Germany in 2000 and a Ph.D. Degree (Dr.-Ing.) in CS from FAU In 2009. His main research interests are the design of massively parallel architectures, ranging from dedicated hardware to multi-core architectures, mapping methodologies for domain-specific computing, and architecture/compiler co-design. Frank is a Senior Member of the IEEE and an Affiliate Member of the European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC).

Introduction.- Fundamentals and Compiler Framework.- Symbolic Parallelization.- Symbolic Multi-level Parallelization.- On-demand Fault-tolerant Loop Processing.- Conclusions.

Erscheinungsdatum	17.03.2018
Zusatzinfo	XII, 176 p. 33 illus. in color.
Verlagsort	Cham
Sprache	englisch
Maße	155 x 235 mm
Gewicht	450 g
Themenwelt	Mathematik / Informatik ► Informatik ► Theorie / Studium
Themenwelt	Technik ► Elektrotechnik / Energietechnik
Schlagworte	compiler optimizations • Heterogeneous Multiprocessor-On-A-Chip • Invasive Computing • Parallel Computing • Polyhedron Model
ISBN-13	9783319739083 / 9783319739083
Zustand	Neuware