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Programming Multicore and Many-core Computing Systems - Blick ins Buch

Programming Multicore and Many-core Computing Systems (eBook)

Sabri Pllana, Fatos Xhafa (Herausgeber)

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2017
John Wiley & Sons (Verlag)
978-1-119-33200-8 (ISBN)

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Programming multi-core and many-core computing systems

Sabri Pllana, Linnaeus University, Sweden

Fatos Xhafa, Technical University of Catalonia, Spain

Provides state-of-the-art methods for programming multi-core and many-core systems

The book comprises a selection of twenty two chapters covering: fundamental techniques and algorithms; programming approaches; methodologies and frameworks; scheduling and management; testing and evaluation methodologies; and case studies for programming multi-core and many-core systems.

Program development for multi-core processors, especially for heterogeneous multi-core processors, is significantly more complex than for single-core processors. However, programmers have been traditionally trained for the development of sequential programs, and only a small percentage of them have experience with parallel programming.  In the past, only a relatively small group of programmers interested in High Performance Computing (HPC) was concerned with the parallel programming issues, but the situation has changed dramatically with the appearance of multi-core processors on commonly used computing systems. It is expected that with the pervasiveness of multi-core processors, parallel programming will become mainstream.

The pervasiveness of multi-core processors affects a large spectrum of systems, from embedded and general-purpose, to high-end computing systems. This book assists programmers in mastering the efficient programming of multi-core systems, which is of paramount importance for the software-intensive industry towards a more effective product-development cycle.

Key features:

  • Lessons, challenges, and roadmaps ahead.
  • Contains real world examples and case studies.
  • Helps programmers in mastering the efficient programming of multi-core and many-core systems.

The book serves as a reference for a larger audience of practitioners, young researchers and graduate level students. A basic level of programming knowledge is required to use this book.



Sabri Pllana is an Associate Professor in the Department of Computer Science at Linnaeus University, Sweden. Before joining Linnaeus University, he worked for 12 years at the Research Group Scientific Computing, University of Vienna in Austria. His current research interests include performance-oriented software engineering and self-adaptive techniques for performance portability across various heterogeneous computing systems. He contributed to several EU-funded projects and coordinated the FP7 project PEPPHER. He has contributed as member/chair to more than 60 program committees. He holds a PhD degree (with distinction) in computer science from the Vienna University of Technology. He is a Senior Member of the IEEE, a member of the European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC) and of the European ICT COST Action (IC1406) on High-Performance Modelling and Simulation for Big Data Applications, an associate member of ETP4HPC, and a member of the Euro-Par Advisory Board.
Fatos Xhafa received his PhD in Computer Science in 1998 from the Technical University of Catalonia (UPC), Barcelona, Spain. Currently, he holds a permanent position of Professor Titular d'Universitat at UPC. He was a Visiting Professor at University of London (UK), 2009-2010, and Research Associate at Drexel University (USA), 2004/2005.  He has widely published in international journals, conferences/workshops, book chapters, edited books and proceedings in the field. He is editor in Chief of the International Journal of Grid and Utility Computing, International Journal of Space-based and Situated Computing, Inderscience. He is Editor in Chief of the Elsevier Book Series 'Intelligent Data-Centric Systems' and of Springer Lecture Notes in Data Engineering and Communication Technologies. He is a member of IEEE Communications Society, IEEE Systems, Man & Cybernetics Society and Emerging Technical Subcommittee of IoT. His research interests include parallel and distributed computing, massive data processing, collective intelligence, optimization, trustworthy computing, machine learning, etc.

Sabri Pllana is an Associate Professor in the Department of Computer Science at Linnaeus University, Sweden. Before joining Linnaeus University, he worked for 12 years at the Research Group Scientific Computing, University of Vienna in Austria. His current research interests include performance-oriented software engineering and self-adaptive techniques for performance portability across various heterogeneous computing systems. He contributed to several EU-funded projects and coordinated the FP7 project PEPPHER. He has contributed as member/chair to more than 60 program committees. He holds a PhD degree (with distinction) in computer science from the Vienna University of Technology. He is a Senior Member of the IEEE, a member of the European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC) and of the European ICT COST Action (IC1406) on High-Performance Modelling and Simulation for Big Data Applications, an associate member of ETP4HPC, and a member of the Euro-Par Advisory Board. Fatos Xhafa received his PhD in Computer Science in 1998 from the Technical University of Catalonia (UPC), Barcelona, Spain. Currently, he holds a permanent position of Professor Titular d'Universitat at UPC. He was a Visiting Professor at University of London (UK), 2009-2010, and Research Associate at Drexel University (USA), 2004/2005. He has widely published in international journals, conferences/workshops, book chapters, edited books and proceedings in the field. He is editor in Chief of the International Journal of Grid and Utility Computing, International Journal of Space-based and Situated Computing, Inderscience. He is Editor in Chief of the Elsevier Book Series "Intelligent Data-Centric Systems" and of Springer Lecture Notes in Data Engineering and Communication Technologies. He is a member of IEEE Communications Society, IEEE Systems, Man & Cybernetics Society and Emerging Technical Subcommittee of IoT. His research interests include parallel and distributed computing, massive data processing, collective intelligence, optimization, trustworthy computing, machine learning, etc.

LIST OF CONTRIBUTORS ix

PREFACE xv

ACKNOWLEDGEMENTS xxiii

ACRONYMS xxv

PART I FOUNDATIONS

1 Multi- and Many-Cores, Architectural Overview for Programmers 1
Lasse Natvig, Alexandru Iordan, Mujahed Eleyat, Magnus Jahre and Jorn Amundsen

2 Programming Models for MultiCore and Many-Core Computing Systems 29
Ana Lucia Varbanescu, Rob V. van Nieuwpoort, Pieter Hijma, Henri E. Bal, Rosa M. Badia and Xavier Martorell

3 Lock-free Concurrent Data Structures 59
Daniel Cederman, Anders Gidenstam, Phuong Ha, Håkan Sundell, Marina Papatriantafilou and Philippas Tsigas

4 Software Transactional Memory 81
Sandya Mannarswamy

PART II PROGRAMMING APPROACHES

5 Hybrid/Heterogeneous Programming with OMPSs and its Software/Hardware Implications 101
Eduard Ayguade, Rosa M. Badia, Pieter Bellens, Javier Bueno, Alejandro Duran, Yoav Etsion, Montse Farreras, Roger Ferrer, Jesus Labarta, Vladimir Marjanovic, Lluis Martinell, Xavier Martorell, Josep M. Perez, Judit Planas, Alex Ramirez, Xavier Teruel, Ioanna Tsalouchidou and Mateo Valero

6 Skeleton Programming for Portable Many-Core Computing 121
Christoph Kessler, Sergei Gorlatch, Johan Enmyren, Usman Dastgeer, Michel Steuwer and Philipp Kegel

7 DSL Stream Programming on Multicore Architectures 143
Pablo de Oliveira Castro, Stephane Louise and Denis Barthou´

8 Programming with Transactional Memory 165
Vincent Gramoli and Rachid Guerraoui

9 Object-Oriented Stream Programming 185
Frank Otto and Walter F. Tichy

10 Software-Based Speculative Parallelization 205
Chen Tian, Min Feng and Rajiv Gupta

11 Autonomic Distribution and Adaptation 227
Lutz Schubert, Stefan Wesner, Daniel Rubio Bonilla and Tom-maso Cucinotta

PART III PROGRAMMING FRAMEWORKS

12 PEPPHER: Performance Portability and Programmability for Heterogeneous Many-Core Architectures 243
Siegfried Benkner, Sabri Pllana, Jesper Larsson Trff, Philippas Tsigas, Andrew Richards, George Russell, Samuel Thibault, Cdric Augonnet, Raymond Namyst, Herbert Cornelius, Christoph Keler, David Moloney and Peter Sanders

13 Fastflow: High-Level and Efficient Streaming on Multicore 261
Marco Aldinucci, Marco Danelutto, Peter Kilpatrick and Massimo Torquati

14 Parallel Programming Framework for H.264/AVC Video Encoding in Multicore Systems 281
Nuno Roma, Antnio Rodrigues and Leonel Sousa

15 Parallelizing Evolutionary Algorithms on GPGPU Cards with the EASEA Platform 301
Ogier Maitre, Frederic Kruger, Deepak Sharma, Stephane Querry, Nicolas Lachiche and Pierre Collet

PART IV TESTINE, EVALUATION AN OPTIMIZATION

16 Smart Interleavings for Testing Parallel Programs 323
Eitan Farchi

17 Parallel Performance Evaluation and Optimization 343
Hazim Shafi

18 A Methodology for Optimizing Multithreaded System Scalability on Multicores 363
Neil Gunther, Shanti Subramanyam and Stefan Parvu

19 Improving Multicore System Performance through Data Compression 385
Ozcan Ozturk and Mahmut Kandemir

PART V SCHEDULING AND MANAGEMENT

20 Programming and Managing Resources on Accelerator-Enabled Clusters 407
M. Mustafa Rafique, Ali R. Butt and Dimitrios S. Nikolopoulos

21 An Approach for Efficient Execution of SPMD Applications on Multicore Clusters 431
Ronal Muresano, Dolores Rexachs and Emilio Luque

22 Operating System and Scheduling for Future Multicore and Many-Core Platforms 451
Tommaso Cucinotta, Giuseppe Lipari and Lutz Schubert

GLOSSARY 475

INDEX 481

LIST OF CONTRIBUTORS


  1. Marco Aldinucci, Computer Science Department, University of Torino, Corso Svizzera 185, 10149 Torino, Italy. [email: aldinuc@di.unito.it]
  2. Jørn Amundsen, Norwegian University of Science and Technology, SemSælandsvei 7-9, NO-7491 Trondheim, Norway. [email: jorn.amundsen@ntnu.no]
  3. Eduard Ayguade, Barcelona Supercomputing Center, Nexus-2 Building, 3rd Floor, Jordi Girona 29, 08034 Barcelona, Spain. [email: eduard.ayguade@bsc.es]
  4. Rosa M. Badia, Barcelona Supercomputing Center, Nexus-2 Building, 3rd Floor, Jordi Girona 29, 08034 Barcelona, Spain. [email: rosa.m.badia@bsc.es]
  5. Henri E. Bal, Department of Computer Science, Vrije Universiteit, De Boelelaan 1081A,1081 HV, Amsterdam, The Netherlands. [email: bal@cs.vu.nl]
  6. Denis Barthou, INRIA Bordeaux Sud-Ouest, 200 avenue de la Vieille Tour 33405 Talence Cedex, France. [email: denis.barthou@labri.fr]
  7. Pieter Bellens, Barcelona Supercomputing Center, Nexus-2 Building, 3rd Floor, Jordi Girona 29, 08034 Barcelona, Spain. [email: pieter.bellens@bsc.es]
  8. Siegfried Benkner, Faculty of Computer Science, University of Vienna, Wahringerstrasse29, A-1090 Vienna, Austria. [email: sigi@par.univie.ac.at]
  9. Daniel Rubio Bonilla, Department for Intelligent Service Infrastructures, HLRS, University of Stuttgart, Nobelstr. 19, 70569 Stuttgart, Germany. [email: rubio@hlrs.de]
  10. Javier Bueno, Barcelona Supercomputing Center, Nexus-2 Building, 3rd Floor, Jordi Girona 29, 08034 Barcelona, Spain. [email: javier.bueno@bsc.es]
  11. Ali R. Butt, Virginia Tech, 2202 Kraft Drive (0106), Blacksburg, VA 24061, USA. [email: butta@cs.vt.edu]
  12. Daniel Cederman, Department of Computer Science and Engineering, Chalmers University of Technology, SE-412 96 Göteborg, Sweden. [email: cederman@chalmers.se]
  13. Pierre Collet, Strasbourg University, Pole API BdSébastien Brant BP 10413 67412 Illkirch CEDEX France. [email: pierre.collet@unistra.fr]
  14. Herbert Cornelius, Intel Gmbh, DornacherStrasse 1, D-85622 Feldkirchen, Germany. [email: herbert.cornelius@intel.com]
  15. Tommaso Cucinotta, Retis Lab, ScuolaSuperioreSant'Anna CEIICP, Att.NeFrancesca Gattai, Via Moruzzi 1, 56124 Pisa, Italy. [email: tommaso.cucinotta@sssup.it]
  16. Marco Danelutto, Computer Science Department, University of Pisa, Largo Pontecorvo3, 56127 Pisa, Italy. [email: marcod@di.unipi.it]
  17. Usman Dastgeer, IDA, Linköping University, S-58183 Linköping, Sweden. [email: usman.dastgeer@liu.se]
  18. Pablo De Oliveira Castro, CEA, LIST, Université De Versailles, 45, Avenue DesÉtats Unis, Versailles, 78035 France. [email: pablo.oliveira@exascale-computing.eu]
  19. Alejandro Duran, Barcelona Supercomputing Center, Nexus-2 Building, 3rd Floor, Jordi Girona 29, 08034 Barcelona, Spain. [email: alex.duran@bsc.es]
  20. Mujahed Eleyat, University of Science and Technology (NTU), SemSælandsvei 7-9, NO-7491 Trondheim, Norway. [email: mujahed.eleyat@miriam.as]
  21. Johan Enmyren, IDA, Linköping University, S-58183 Linköping, Sweden. [email: x10johen@ida.liu.se]
  22. Yoav Etsion, Barcelona Supercomputing Center, Nexus-2 Building, 3rd Floor, Jordi Girona 29, 08034 Barcelona, Spain. [email: yoav.etsion@bsc.es]
  23. Eitan Farchi, IBM, 49 Hashmonaim Street, Pardes Hanna 37052, Israel. [email: farchi@il.ibm.com]
  24. Montse Farreras, Barcelona Supercomputing Center, Nexus-2 Building, 3rd Floor, Jordi Girona 29, 08034 Barcelona, Spain. [email: mfarrera@ac.upc.edu]
  25. Min Feng, Department of Computer Science, The University of California At Riverside, Engineering Bldg. Unit 2, Rm. 463, Riverside, CA 92521, USA. [email: mfeng@cs.ucr.edu]
  26. Roger Ferrer, Barcelona Supercomputing Center, Nexus-2 Building, 3rd Floor, Jordi Girona 29, 08034 Barcelona, Spain. [email: roger.ferrer@bsc.es]
  27. Anders Gidenstam, School of Business and Informatics, Högskolan I Borås, S-50190 Borås, Sweden. [email: anders.gidenstam@hb.se]
  28. Sergei Gorlatch, FB10, Universität Münster, D-48149 Münster, Germany. [email: gorlatch@uni-muenster.de]
  29. Vincent Gramoli, LPD, EPFL IC, Station 14, CH-1015 Lausanne, Switzerland. [email: vincent.gramoli@epfl.ch]
  30. Rachid Guerraoui, LPD, EPFL IC, Station 14, CH-1015 Lausanne, Switzerland. [email: rachid.guerraoui@epfl.ch]
  31. Neil Gunther, Performance Dynamics Company, 4061 East Castro Valley Blvd. Suite 110, Castro Valley, CA 95954, USA. [email: njgunther@perfdynamics.com]
  32. Rajiv Gupta, Department of Computer Science, The University of California at Riverside, Engineering Bldg. Unit 2, Rm. 408, Riverside, CA 92521, USA. [email: gupta@cs.ucr.edu]
  33. Phuong Ha, Department of Computer Science, Faculty of Science, University of Tromsø, NO-9037 Tromsø, Norway. [email: phuong@cs.uit.no]
  34. Pieter Hijma, Department of Computer Science, Vrije Universiteit, De Boelelaan1081A, 1081 HV, Amsterdam, The Netherlands. [email: pieter@cs.vu.nl]
  35. Alexandru Iordan, University of Science and Technology (NTU), SemSælandsvei 7-9, NO-7491 Trondheim, Norway. [email: iordan@idi.ntnu.no]
  36. Magnus Jahre, University of Science and Technology (NTU), SemSælandsvei 7-9, NO-7491 Trondheim, Norway. [email: jahre@idi.ntnu.no]
  37. Mahmut Kandemir, The Pennsylvania State University, 111 IST Building, University Park, PA 16802, USA. [email: kandemir@cse.psu.edu]
  38. Philipp Kegel, FB10, Universität Münster, D-48149 Münster, Germany. [email:philipp.kegel@uni-muenster.de]
  39. Christoph Kessler, IDA, Linköping University, S-58183 Linköping, Sweden. [email: christoph.kessler@liu.se]
  40. Peter Kilpatrick, School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Belfast BT7 1NN, UK. [email: p.kilpatrick@qub.ac.uk]
  41. Jesus Labarta, Barcelona Supercomputing Center, Nexus-2 Building, 3rd Floor, Jordi Girona 29, 08034 Barcelona, Spain. [email: jesus.labarta@bsc.es]
  42. Nicolas Lachiche, Strasbourg University, Pole API BdSébastien Brant BP 10413 67412 Illkirch CEDEX France. [email: nicolas.lachiche@unistra.fr]
  43. Giuseppe Lipari, Real-Time Systems Laboratory, ScuolaSuperioreSant'Anna, Pisa, Italy. [email: g.lipari@sssup.it]
  44. Stéphane Louise, CEA, LIST, Gif-Sur-Yvette, 91191 France. [email: stephane.louise@cea.fr]
  45. Emilio Luque, Computer Architecture and Operating System Department, Universitat Autonoma De Barcelona, 08193, Barcelona, Spain. [email: emilio.luque@uab.es]
  46. Ogier Maitre, Strasbourg University, Pole API BdSébastien Brant BP 10413 67412 Illkirch CEDEX France. [email: ogier.maitre@unistra.fr]
  47. Sandya Mannarswamy, Xerox Research Centre India, 225 1st C Cross, 2nd Main, Kasturi Nagar, Bangalore, India. 560043. [email: sandya@hp.com]
  48. Vladimir Marjanovic, Barcelona Supercomputing Center, Nexus-2 Building, Jordi Girona 29, 08034 Barcelona, Spain. [email: vladimir.marjanovic@bsc.es]
  49. Lluis Martinell, Barcelona Supercomputing Center, Nexus-2 Building, 3rd Floor, Jordi Girona 29, 08034 Barcelona, Spain. [email: luis.martinell@bsc.es]
  50. Xavier Martorell, Barcelona Supercomputing Center, Nexus-2 Building, Jordi Girona 29, 08034 Barcelona, Spain. [email: xavim@ac.upc.edu]
  51. David Moloney, Movidius Ltd., Mountjoy Square East 19, D1 Dublin, Ireland. [email: david.moloney@movidius.com]
  52. Ronal Muresano, Computer Architecture and Operating System Department, Universitat Autonoma De Barcelona, 08193, Barcelona, Spain. [email: rmuresano@caos.uab.es]
  53. M. Mustafa Rafique, Virginia Tech, 2202 Kraft Drive (0106), Blacksburg, Virginia 24061, USA. [email: mustafa@cs.vt.edu]
  54. Raymond Namyst, Institut National De Recherche En Informatique Et En Automatique (INRIA), Bordeaux Sud-Ouest, Cours De La Liberation 351, F-33405 Talence Cedex, France. [email: raymond.namyst@labri.fr]
  55. Lasse Natvig, University of Science and Technology (NTU), Semsælandsvei 7-9, NO-7491 Trondheim, Norway. [email: lasse@idi.ntnu.no]
  56. Dimitrios S. Nikolopoulos, FORTH-ICS, N. Plastira 100, VassilikaVouton, Heraklion, Crete, Greece. [email: dsn@ics.forth.gr]
  57. Frank Otto, Institute for Program Structures and Data Organization, Karlsruhe Institute of Technology, Am Fasanengarten 5, 76131 Karlsruhe, Germany. [email: frank.otto@kit.edu]
  58. Ozcan Ozturk, Department of Computer Engineering, Engineering Building, EA 407B, Bilkent University, Bilkent, 06800, Ankara, Turkey. [email: ozturk@cs.bilkent.edu.tr]
  59. Marina Papatriantafilou, Department of Computer Science and Engineering, Chalmers University of Technology, SE-412 96 Göteborg, Sweden. [email: ptrianta@chalmers.se]
  60. Stefan Parvu, Nokia Group, Espoo, Karakaari 15, Finland. [email: stefan.parvu@nokia.com]
  61. Josep M. Perez, Barcelona Supercomputing Center, Nexus-2 Building, 3rd Floor, Jordi Girona 29, 08034 Barcelona, Spain. [email: josep.m.perez@bsc.es]
  62. Judit Planas, Barcelona Supercomputing Center, Nexus-2 Building, 3rd Floor, Jordi Girona 29, 08034 Barcelona, Spain. [email: judit.planas@bsc.es]
  63. Sabri Pllana, Department of Computer Science, Linnaeus University, SE-351 95 Vaxjo, Sweden. [email: sabri.pllana@lnu.se]
  64. Stephane Querry, Pole API...

Erscheint lt. Verlag 23.1.2017
Reihe/Serie Wiley Series on Parallel and Distributed Computing
Wiley Series on Parallel and Distributed Computing
Wiley Series on Parallel and Distributed Computing
Sprache englisch
Themenwelt Mathematik / Informatik ► Informatik ► Netzwerke
Mathematik / Informatik ► Informatik ► Theorie / Studium
Schlagworte computer programmers • Computer Science • Grid & Cloud Computing • Grid- u. Cloud-Computing • Heterogeneous Many-core Architectures • Informatik • Multi-core Clusters • Objectoriented Stream Programming • Optimization for Multi-core and Many-core Computing Systems • Parallel and Distributed Computing • Paralleles u. Verteiltes Rechnen • Parallel Performance • product-development cycle • Programming Multi-core and Many-core Computing Systems • programming multi-core systems • Programming with Transactional Memory • Scheduling • Skeleton Programming • spectrum of computing systems • state-of-the-art methods for programming • Testing Parallel Programs • Verteilte Programmierung
ISBN-10 1-119-33200-1 / 1119332001
ISBN-13 978-1-119-33200-8 / 9781119332008
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