Intel Xeon Phi Processor High Performance Programming (eBook)

Knights Landing Edition

James Jeffers, James Reinders, Avinash Sodani (Autoren)

eBook Download: EPUB

2016 | 2. Auflage
662 Seiten
Elsevier Science (Verlag)
978-0-12-809195-1 (ISBN)

Infos

Intel Xeon Phi Processor High Performance Programming is an all-in-one source of information for programming the Second-Generation Intel Xeon Phi product family also called Knights Landing. The authors provide detailed and timely Knights Landingspecific details, programming advice, and real-world examples. The authors distill their years of Xeon Phi programming experience coupled with insights from many expert customers - Intel Field Engineers, Application Engineers, and Technical Consulting Engineers - to create this authoritative book on the essentials of programming for Intel Xeon Phi products. Intel® Xeon Phi? Processor High-Performance Programming is useful even before you ever program a system with an Intel Xeon Phi processor. To help ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi processors, or other high-performance microprocessors. Applying these techniques will generally increase your program performance on any system and prepare you better for Intel Xeon Phi processors. - A practical guide to the essentials for programming Intel Xeon Phi processors - Definitive coverage of the Knights Landing architecture - Presents best practices for portable, high-performance computing and a familiar and proven threads and vectors programming model - Includes real world code examples that highlight usages of the unique aspects of this new highly parallel and high-performance computational product - Covers use of MCDRAM, AVX-512, Intel® Omni-Path fabric, many-cores (up to 72), and many threads (4 per core) - Covers software developer tools, libraries and programming models - Covers using Knights Landing as a processor and a coprocessor

Jim Jeffers was the primary strategic planner and one of the first full-time employees on the program that became Intel ® MIC. He served as lead SW Engineering Manager on the program and formed and launched the SW development team. As the program evolved, he became the workloads (applications) and SW performance team manager. He has some of the deepest insight into the market, architecture and programming usages of the MIC product line. He has been a developer and development manager for embedded and high performance systems for close to 30 years.

Produkt-Details

• Erscheint lt. Verlag: 31.5.2016
• Sprache: englisch
• Themenwelt: Mathematik / Informatik ► Informatik ► Netzwerke
• Themenwelt: Mathematik / Informatik ► Informatik ► Programmiersprachen / -werkzeuge
• Themenwelt: Mathematik / Informatik ► Informatik ► Theorie / Studium
• Themenwelt: Informatik ► Weitere Themen ► Hardware
• ISBN-10: 0-12-809195-9 / 0128091959
• ISBN-13: 978-0-12-809195-1 / 9780128091951