Event-Based Neuromorphic Systems (eBook)
John Wiley & Sons (Verlag)
978-1-118-92762-5 (ISBN)
Neuromorphic electronic engineering takes its inspiration from the functioning of nervous systems to build more power efficient electronic sensors and processors. Event-based neuromorphic systems are inspired by the brain's efficient data-driven communication design, which is key to its quick responses and remarkable capabilities. This cross-disciplinary text establishes how circuit building blocks are combined in architectures to construct complete systems. These include vision and auditory sensors as well as neuronal processing and learning circuits that implement models of nervous systems.
Techniques for building multi-chip scalable systems are considered throughout the book, including methods for dealing with transistor mismatch, extensive discussions of communication and interfacing, and making systems that operate in the real world. The book also provides historical context that helps relate the architectures and circuits to each other and that guides readers to the extensive literature. Chapters are written by founding experts and have been extensively edited for overall coherence.
This pioneering text is an indispensable resource for practicing neuromorphic electronic engineers, advanced electrical engineering and computer science students and researchers interested in neuromorphic systems.
Key features:
- Summarises the latest design approaches, applications, and future challenges in the field of neuromorphic engineering.
- Presents examples of practical applications of neuromorphic design principles.
- Covers address-event communication, retinas, cochleas, locomotion, learning theory, neurons, synapses, floating gate circuits, hardware and software infrastructure, algorithms, and future challenges.
Shih-Chii Liu is a group leader at the Institute of Neuroinformatics, University of Zurich and ETH Zurich. She received her Ph.D. in the Computation and Neural Systems program at Caltech. She has been an instructor and topic organizer at the NSF Telluride Neuromorphic Cognition Engineering Workshop in Telluride, Colorado since 1998. She has also co-authored a book on analog VLSI circuits (published by MIT Press), is an IEEE Senior member and has held offices in a number of scientific and IEEE engineering international conferences. Dr Liu has been working on event-based vision and auditory sensors, multi-neuron networks, and asynchronous circuits for more than 20 years.
Tobi Delbruck has been Professor of Physics and Electrical Engineering at the Institute of Neuroinformatics since 1998. He leads the Sensors group which focuses on neuromorphic sensors and processing. He received his Ph.D. in the Computation and Neural Systems program at Caltech. He worked on electronic imaging at Arithmos, Synaptics, National Semiconductor, and Foveon. He co-organized the Telluride Neuromorphic Cognition Engineering summer workshop and the live demonstration sessions at ISCAS and NIPS, and is former chair of the IEEE CAS Sensory Systems Technical Committee. He has been awarded 9 IEEE awards and is an IEEE Fellow.
Giacomo Indiveri is a Professor at the University of Zurich's Faculty of Science. He obtained his M.Sc. degree in Electrical Engineering and his Ph.D. degree in Computer Science from the University of Genoa, Italy. He is an ERC fellow and an IEEE Senior member. His research interests lie in the study of real and artificial neural processing systems, and in the hardware implementation of neuromorphic cognitive systems, using full custom analog and digital VLSI technology.
Adrian M. Whatley gained a degree in Chemistry at the University of Bristol in England in 1986. After working for 10 years in the British computer industry, he took up his current software engineering position at the Institute of Neuroinformatics where he works primarily on asynchronous Address-Event communication systems.
Rodney Douglas is a co-founder of the Institute of Neuroinformatics. His central research interest over the past 25 years has been the nature of computation by the circuits of the neocortex and their implementation both in software simulation, in custom electronic hardware. The experimental aspect of his work has inspired a number of cortical models of processing that use recurrently connected neuronal architectures. He is currently exploring principles of self-assembly in simple organisms and circuits which he considers crucial for building truly autonomous neuromorphic cognitive systems.
Neuromorphic electronic engineering takes its inspiration from the functioning of nervous systems to build more power efficient electronic sensors and processors. Event-based neuromorphic systems are inspired by the brain's efficient data-driven communication design, which is key to its quick responses and remarkable capabilities. This cross-disciplinary text establishes how circuit building blocks are combined in architectures to construct complete systems. These include vision and auditory sensors as well as neuronal processing and learning circuits that implement models of nervous systems. Techniques for building multi-chip scalable systems are considered throughout the book, including methods for dealing with transistor mismatch, extensive discussions of communication and interfacing, and making systems that operate in the real world. The book also provides historical context that helps relate the architectures and circuits to each other and that guides readers to the extensive literature. Chapters are written by founding experts and have been extensively edited for overall coherence. This pioneering text is an indispensable resource for practicing neuromorphic electronic engineers, advanced electrical engineering and computer science students and researchers interested in neuromorphic systems. Key features: Summarises the latest design approaches, applications, and future challenges in the field of neuromorphic engineering. Presents examples of practical applications of neuromorphic design principles. Covers address-event communication, retinas, cochleas, locomotion, learning theory, neurons, synapses, floating gate circuits, hardware and software infrastructure, algorithms, and future challenges.
Shih-Chii Liu is a group leader at the Institute of Neuroinformatics, University of Zurich and ETH Zurich. She received her Ph.D. in the Computation and Neural Systems program at Caltech. She has been an instructor and topic organizer at the NSF Telluride Neuromorphic Cognition Engineering Workshop in Telluride, Colorado since 1998. She has also co-authored a book on analog VLSI circuits (published by MIT Press), is an IEEE Senior member and has held offices in a number of scientific and IEEE engineering international conferences. Dr Liu has been working on event-based vision and auditory sensors, multi-neuron networks, and asynchronous circuits for more than 20 years. Tobi Delbruck has been Professor of Physics and Electrical Engineering at the Institute of Neuroinformatics since 1998. He leads the Sensors group which focuses on neuromorphic sensors and processing. He received his Ph.D. in the Computation and Neural Systems program at Caltech. He worked on electronic imaging at Arithmos, Synaptics, National Semiconductor, and Foveon. He co-organized the Telluride Neuromorphic Cognition Engineering summer workshop and the live demonstration sessions at ISCAS and NIPS, and is former chair of the IEEE CAS Sensory Systems Technical Committee. He has been awarded 9 IEEE awards and is an IEEE Fellow. Giacomo Indiveri is a Professor at the University of Zurich's Faculty of Science. He obtained his M.Sc. degree in Electrical Engineering and his Ph.D. degree in Computer Science from the University of Genoa, Italy. He is an ERC fellow and an IEEE Senior member. His research interests lie in the study of real and artificial neural processing systems, and in the hardware implementation of neuromorphic cognitive systems, using full custom analog and digital VLSI technology. Adrian M. Whatley gained a degree in Chemistry at the University of Bristol in England in 1986. After working for 10 years in the British computer industry, he took up his current software engineering position at the Institute of Neuroinformatics where he works primarily on asynchronous Address-Event communication systems. Rodney Douglas is a co-founder of the Institute of Neuroinformatics. His central research interest over the past 25 years has been the nature of computation by the circuits of the neocortex and their implementation both in software simulation, in custom electronic hardware. The experimental aspect of his work has inspired a number of cortical models of processing that use recurrently connected neuronal architectures. He is currently exploring principles of self-assembly in simple organisms and circuits which he considers crucial for building truly autonomous neuromorphic cognitive systems.
List of Abbreviations and Acronyms
- 1D
-
one dimensional
- 2D
-
two dimensional
- 3D
-
three dimensional
- ACA
-
analog computing arrays
- ACK
-
acknowledge
- A/D
-
analog–digital (converter)
- ADC
-
analog–digital converter
- AdEx
-
Adaptive exponential integrate-and-fire model
- AE
-
address event
- AEB
-
address-event bus
- AER
-
address-event representation
- AEX
-
AER extension board
- AFGA
-
autozeroing floating-gate amplifier
- AGC
-
automatic gain control
- ALOHA
-
Not actually an abbreviation, ALOHA refers to a network media access protocol originally developed at the University of Hawaii
- ANN
-
artificial neural network
- ANNCORE
-
analog neural network core
- API
-
Application Programming Interface
- APS
-
active pixel sensor
- AQC
-
automatic Q (quality factor) control
- ARM
-
Acorn RISC Machine
- ASIC
-
application-specific integrated circuit
- ASIMO
-
Advanced Step in Innovative MObility (robot)
- ASP
-
analog signal processor/processing
- ATA
-
AT Attachment (also PATA: Parallel ATA); an interface standard for connecting mass storage devices (e.g., hard disks) in computers
- ATIS
-
asynchronous time-based image sensor
- ATLUM
-
Automatic Tape-collecting Lathe Ultra-Microtome
- aVLSI
-
Analog very large scale integration
- BB
-
bias buffer
- BGA
-
ball grid array
- BJT
-
bipolar junction transistor
- BM
-
basilar membrane
- BPF
-
band-pass filter
- bps
-
bits per second
- Bps
-
bytes per second
- BSI
-
back-side illumination
- C4
-
capacitively coupled current conveyor
- CAB
-
computational analog block
- CADSP
-
cooperative analog–digital signal processing
- CAVIAR
-
Convolution AER Vision Architecture for Real-time
- CCD
-
charge-coupled device
- CCN
-
cooperative and competitive network
- CCW
-
counter clockwise
- CDS
-
correlated double sampling
- CIS
-
CMOS image sensor
- CLBT
-
compatible lateral bipolar transistor
- CMI
-
current-mirror integrator
- CMOS
-
complementary metal oxide semiconductor
- CoP
-
center of pressure
- CPG
-
central pattern generator
- CPLD
-
complex programmable logic device
- CPU
-
central processing unit
- CSMA
-
carrier sense multiple access
- CV
-
coefficient of variation
- CW
-
clockwise
- DAC
-
digital-to-analog converter
- DAEB
-
domain address -event bus
- DAVIS
-
Dynamic and Active-Pixel Vision Sensor
- DC
-
direct current
- DCT
-
discrete cosine transform
- DDS
-
differential double sampling
- DFA
-
deterministic finite automaton
- DIY
-
do it yourself
- DMA
-
direct memory access
- DNC
-
digital network chip
- DOF
-
degree(s) of freedom
- DPE
-
dynamic parameter estimation
- DPI
-
differential pair integrator
- DPRAM
-
dual-ported RAM
- DRAM
-
dynamic random access memory
- DSP
-
digital signal processor/processing
- DVS
-
dynamic vision sensor
- EEPROM
-
electrically erasable programmable read only memory
- EPSC
-
excitatory post-synaptic current
- EPSP
-
excitatory post-synaptic potential
- ESD
-
electrostatic discharge
- ETH
-
Eidgenössische Technische Hochschule
- EU
-
European Union
- FACETS
-
Fast Analog Computing with Emergent Transient States
- FE
-
frame events
- FET
-
field effect transistor
- FET
-
also Future and Emerging Technologies
- FG
-
floating gate
- FIFO
-
First-In First-Out (memory)
- fMRI
-
functional magnetic resonance imaging
- FPAA
-
field-programmable analog array
- FPGA
-
field-programmable gate array
- FPN
-
fixed pattern noise
- FPS
-
frames per second
- FSI
-
front side illumination
- FSM
-
finite state machine
- FX2LP
-
A highly integrated USB 2.0 microcontroller from Cypress Semiconductor Corporation
- GALS
-
globally asynchronous, locally synchronous
- GB
-
gigabyte, 230 bytes
- Gbps
-
gigabits per second
- Geps
-
giga events per second
- GPL
-
general public license
- GPS
-
global positioning system
- GPU
-
graphics processing unit
- GUI
-
graphical user interface
- HCO
-
half-center oscillator
- HDL
-
Hardware Description Language
- HEI
-
hot electron injection
- HH
-
Hodgkin–Huxley
- HiAER
-
hierarchical AER
- HICANN
-
high input count analog neural network
- HMAX
-
Hierarchical Model and X
- HMM
-
Hidden Markov Model
- HTML
-
Hyper-Text Markup Language
- HW
-
hardware
- HWR
-
half-wave rectifier
- hWTA
-
hard winner-take-all
- I&F
-
integrate-and-fire
- IC
-
integrated circuit
- IDC
-
insulation displacement connector
- IEEE
-
Institute of Electrical and Electronics Engineers
- IFAT
-
integrate-and-fire array transceiver
- IHC
-
inner hair cell
- IMS
-
intramuscular stimulation
- IMU
-
inertial or intensity measurement unit
- INCF
-
International Neuroinformatics Coordinating Facility
- INE
-
Institute of Neuromorphic Engineering
- I/O
-
input/output
- IP
-
intellectual property
- IPSC
-
inhibitory post-synaptic current
- ISI
-
inter-spike interval
- ISMS
-
intraspinal micro stimulation
- ITD
-
interaural time difference
- JPEG
-
Joint Photographic Experts Group
- KB
-
kilobyte, 210 bytes
- keps
-
kilo events per second
- LAEB
-
local address-event bus
- LFSR
-
linear feedback shift register
- LIF
-
leaky integrate-and-fire
- LLN
-
log-domain LPF neuron
- LMS
-
least mean squares
- LPF
-
low-pass filter
- LSM
-
liquid-state machine
- LTD
-
long-term depression
- LTI
-
linear time-invariant
- LTN
-
linear threshold neuron
- LTP
-
long-term potentiation
- LTU
-
linear threshold unit
- LUT
-
look-up table
- LVDS
-
low voltage differential signaling
- MACs
-
multiplyand accumulate operations
- MB
-
megabyte, 220 bytes
- MEMs
-
microelectromechanical systems
- Meps
-
mega events per second
- MIM
-
metal insulator metal...
| Erscheint lt. Verlag | 24.12.2014 |
|---|---|
| Sprache | englisch |
| Themenwelt | Mathematik / Informatik ► Informatik ► Theorie / Studium |
| Technik ► Elektrotechnik / Energietechnik | |
| Schlagworte | Circuit Theory & Design / VLSI / ULSI • Cochleas • Electrical & Electronics Engineering • Elektrotechnik u. Elektronik • Event-based Neuromorphic systems • Event-based sensors • Intelligente Systeme u. Agenten • Intelligent Systems & Agents • Multi-neuron chips • Retinas • Robotics • Robotik • Schaltkreise - Theorie u. Entwurf / VLSI / ULSI • Schaltkreistechnik • synapses |
| ISBN-10 | 1-118-92762-1 / 1118927621 |
| ISBN-13 | 978-1-118-92762-5 / 9781118927625 |
| Informationen gemäß Produktsicherheitsverordnung (GPSR) | |
| Haben Sie eine Frage zum Produkt? |
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