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Pipelined Multiprocessor System-on-Chip for Multimedia

Haris Javaid, Sri Parameswaran (Autoren)

Buch | Hardcover

VIII, 169 Seiten

2013
Springer International Publishing (Verlag)
9783319011127 (ISBN)

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This book describes analytical models and estimation methods to enhance performance estimation of pipelined multiprocessor systems-on-chip (MPSoCs). A framework is introduced for both design-time and run-time optimizations. For design space exploration, several algorithms are presented to minimize the area footprint of a pipelined MPSoC under a latency or a throughput constraint. A novel adaptive pipelined MPSoC architecture is described, where idle processors are transitioned into low-power states at run-time to reduce energy consumption. Multi-mode pipelined MPSoCs are introduced, where multiple pipelined MPSoCs optimized separately are merged into a single pipelined MPSoC, enabling further reduction of the area footprint by sharing the processors and communication buffers. Readers will benefit from the authors' combined use of analytical models, estimation methods and exploration algorithms and will be enabled to explore billions of design points in a few minutes.

Introduction.- Literature Survey.- Optimisation Framework.- Performance Estimation of Pipelined MPSoCs.- Design Space Exploration of Pipelined MPSoCs.- Adaptive Pipelined MPSoCs.- Power Management in Adaptive Pipelined MPSocs.- Multi-mode Pipelined MPSoCs.- Conclusions and Future Work.

Erscheint lt. Verlag	9.12.2013
Zusatzinfo	VIII, 169 p. 40 illus., 32 illus. in color.
Verlagsort	Cham
Sprache	englisch
Maße	155 x 235 mm
Gewicht	438 g
Themenwelt	Mathematik / Informatik ► Informatik ► Theorie / Studium
Themenwelt	Technik ► Elektrotechnik / Energietechnik
Schlagworte	Design Space Exploration for MPSoC • MPSoC • MPSoC for Multimedia • MPSoCs • Multiprocessor System-on-Chip • Performance Estimation for MPSoC • Pipeline-level Parallelism and Multimedia • Power Management for MPSoC
ISBN-13	9783319011127 / 9783319011127
Zustand	Neuware