Ingredients for Successful System Level Design Methodology (eBook)

Hiren D. Patel, Sandeep Kumar Shukla (Autoren)

eBook Download: PDF

2008 | 2008
XVI, 208 Seiten
Springer Netherlands (Verlag)
978-1-4020-8472-0 (ISBN)

Infos

ESL or 'Electronic System Level' is a buzz word these days, in the electronic design automation (EDA) industry, in design houses, and in the academia. Even though numerous trade magazine articles have been written, quite a few books have been published that have attempted to de?ne ESL, it is still not clear what exactly it entails. However, what seems clear to every one is that the 'Register Transfer Level' (RTL) languages are not adequate any more to be the design entry point for today's and tomorrow's complex electronic system design. There are multiple reasons for such thoughts. First, the c- tinued progression of the miniaturization of the silicon technology has led to the ability of putting almost a billion transistors on a single chip. Second, applications are becoming more and more complex, and integrated with c- munication, control, ubiquitous and pervasive computing, and hence the need for ever faster, ever more reliable, and more robust electronic systems is pu- ing designers towards a productivity demand that is not sustainable without a fundamental change in the design methodologies. Also, the hardware and software functionalities are getting interchangeable and ability to model and design both in the same manner is gaining importance. Given this context, we assume that any methodology that allows us to model an entire electronic system from a system perspective, rather than just hardware with discrete-event or cycle based semantics is an ESL method- ogy of some kind.

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ESL or "e;Electronic System Level"e; is a buzz word these days, in the electronic design automation (EDA) industry, in design houses, and in the academia. Even though numerous trade magazine articles have been written, quite a few books have been published that have attempted to de?ne ESL, it is still not clear what exactly it entails. However, what seems clear to every one is that the "e;Register Transfer Level"e; (RTL) languages are not adequate any more to be the design entry point for today's and tomorrow's complex electronic system design. There are multiple reasons for such thoughts. First, the c- tinued progression of the miniaturization of the silicon technology has led to the ability of putting almost a billion transistors on a single chip. Second, applications are becoming more and more complex, and integrated with c- munication, control, ubiquitous and pervasive computing, and hence the need for ever faster, ever more reliable, and more robust electronic systems is pu- ing designers towards a productivity demand that is not sustainable without a fundamental change in the design methodologies. Also, the hardware and software functionalities are getting interchangeable and ability to model and design both in the same manner is gaining importance. Given this context, we assume that any methodology that allows us to model an entire electronic system from a system perspective, rather than just hardware with discrete-event or cycle based semantics is an ESL method- ogy of some kind.

Inhalt

Preface. Acknowledgments. 1 Introduction. 1.1 Motivation. 1.2 Organization 2 Related Work. 2.1 System Level Design Languages and Frameworks. 2.2 Verification of SystemC Designs. 2.3 Reflection and Introspection. 2.4 Service-orientation. 3 Background. 3.1 Fidelity, Expressiveness and Multiple Models of Computation. 4 Behavioral Hierarchy with Hierarchical FSMs (HFSMs). 4.1 Behavioral Modeling versus Structural Modeling. 4.2 Finite State Machine Terminology. 4.3 Requirements for Behavioral Hierarchy in SystemC. 4.4 Execution Semantics for Hierarchical FSMs. 4.5 Implementation of Hierarchical FSMs. 4.6 Modeling Guidelines for HFSM. 4.7 HFSM Example: Power Model. 5 Simulation Semantics for Heterogeneous Behavioral Hierarchy. 5.1 Abstract Semantics. 5.2 Basic Definitions. 5.3 Execution Semantics for Starcharts. 5.4 Our Execution Semantics for Hierarchical FSMs. 5.5 Implementing Heterogeneous Behavioral Hierarchy. 5.6 Examples. 6 Bluespec ESL and its Co-simulation with SystemC DE. 6.1 Advantages of this Work. 6.2 Design Flow. 6.3 BS-ESL Language. 6.4 BS-ESL Execution. 6.5 An Example Demonstrating BS-ESL and SystemC Integration. 6.6 Summary. 6.7 Interoperability between SystemC and BS-ESL. 6.8 Problem Description. 6.9 Solution: Our Interoperability Technique. 6.10 Summary. 7 Model-driven Validation of SystemC Designs. 7.1 Overview of this Work. 7.2 Design Flow. 7.3 Results: Validation of FIFO, FIR and GCD. 7.4 Our Experience. 7.5 Evaluation of this Approach. 7.6 Summary. 8 Service-orientation for Dynamic Integration of Multiple Tools. 8.1 CARH’s Capabilities. 8.2 Issues and Inadequacies of Current SLDLs and Dynamic Validation Frameworks. 8.3 Our Generic Approach to Addressing these Inadequacies. 8.4 CARH’s Software Architecture. 8.5 Services Rendered by CARH. 8.6Usage Model of CARH. 8.7 Simulation Results. 8.8 Our Experience with CARH. 9 Summary Evaluations. 9.1 Modeling and Simulating Heterogeneous Behaviors in SystemC. 9.2 Validating Corner Case Scenarios for SystemC. 9.3 Dynamic Integration of Multiple Tools. 10 Conclusion and Future work. A Parsing SystemC using C/C++ Front-end Compiler. A.1 Tool Flow. A.2 Parsing SystemC. B Eclpise-based Plugin for a SystemC IDE. B.1 Project Overview. B.2 SystemC IDE Feature. B.3 SystemC IDE Plug-in. B.4 Setting up the SystemC IDE. B.5 A Little About Implementation. References.

Produkt-Details

• Erscheint lt. Verlag: 6.6.2008
• Zusatzinfo: XVI, 208 p.
• Verlagsort: Dordrecht
• Sprache: englisch
• Themenwelt: Mathematik / Informatik ► Informatik ► Software Entwicklung
• Themenwelt: Informatik ► Theorie / Studium ► Künstliche Intelligenz / Robotik
• Themenwelt: Mathematik / Informatik ► Mathematik
• Themenwelt: Technik ► Elektrotechnik / Energietechnik
• Schlagworte: Architecture • Electronic design automation (EDA) • Electronic System Level (ESL) • organization • System • System Level Design (SLD) • system-on-chips
• ISBN-10: 1-4020-8472-2 / 1402084722
• ISBN-13: 978-1-4020-8472-0 / 9781402084720