Analog Circuit Design for Process Variation-Resilient Systems-on-a-Chip
Seiten
2012
|
2012 ed.
Springer-Verlag New York Inc.
978-1-4614-2295-2 (ISBN)
Springer-Verlag New York Inc.
978-1-4614-2295-2 (ISBN)
This book describes several techniques to address variation-related design challenges for analog blocks in mixed-signal systems-on-chip. It Includes built-in testing techniques, linked to current industrial trends.
This book describes several techniques to address variation-related design challenges for analog blocks in mixed-signal systems-on-chip. The methods presented are results from recent research works involving receiver front-end circuits, baseband filter linearization, and data conversion. These circuit-level techniques are described, with their relationships to emerging system-level calibration approaches, to tune the performances of analog circuits with digital assistance or control. Coverage also includes a strategy to utilize on-chip temperature sensors to measure the signal power and linearity characteristics of analog/RF circuits, as demonstrated by test chip measurements.
Describes a variety of variation-tolerant analog circuit design examples, including from RF front-ends, high-performance ADCs and baseband filters;
Includes built-in testing techniques, linked to current industrial trends;
Balances digitally-assisted performance tuning with analog performance tuning and mismatch reduction approaches;
Describes theoretical concepts as well as experimental results for test chips designed with variation-aware techniques.
This book describes several techniques to address variation-related design challenges for analog blocks in mixed-signal systems-on-chip. The methods presented are results from recent research works involving receiver front-end circuits, baseband filter linearization, and data conversion. These circuit-level techniques are described, with their relationships to emerging system-level calibration approaches, to tune the performances of analog circuits with digital assistance or control. Coverage also includes a strategy to utilize on-chip temperature sensors to measure the signal power and linearity characteristics of analog/RF circuits, as demonstrated by test chip measurements.
Describes a variety of variation-tolerant analog circuit design examples, including from RF front-ends, high-performance ADCs and baseband filters;
Includes built-in testing techniques, linked to current industrial trends;
Balances digitally-assisted performance tuning with analog performance tuning and mismatch reduction approaches;
Describes theoretical concepts as well as experimental results for test chips designed with variation-aware techniques.
Introduction.- Process Variation Challenges and Solutions Approaches.- High-Linearity Transconductance Amplifiers with Digital Correction Capability.- Multi-Bit Quantizer Design for Continuous-Time Sigma-Delta Modulators with Reduced Device Matching Requirements.- An On-Chip Temperature Sensor for the Measurement of RF Power Dissipation and Thermal Gradients.- Mismatch Reduction for Transitiors in High-Frequency Differential Analog Signal Paths.- Summary and Conclusions.
| Zusatzinfo | XVIII, 174 p. |
|---|---|
| Verlagsort | New York, NY |
| Sprache | englisch |
| Maße | 155 x 235 mm |
| Themenwelt | Mathematik / Informatik ► Informatik ► Theorie / Studium |
| Technik ► Elektrotechnik / Energietechnik | |
| Schlagworte | Analog performance tuning • Built-In Testing • Digitally-assisted performance tuning • Mismatch Reduction • On-chip measurement circuits • System on chip • Variation-Tolerant Analog Circuit Design |
| ISBN-10 | 1-4614-2295-7 / 1461422957 |
| ISBN-13 | 978-1-4614-2295-2 / 9781461422952 |
| Zustand | Neuware |
| Informationen gemäß Produktsicherheitsverordnung (GPSR) | |
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