Hybrid CMOS Single-Electron-Transistor Device and Circuit Design
Artech House Publishers (Verlag)
978-1-59693-069-8 (ISBN)
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CMOS (complementary metal oxide semiconductor) is a widely accepted and utilized technology among electrical engineers involved with circuit design. SET (single electron transistor) technology has recently gained significant attention, because it can be combined with CMOSs to improve overall performance of integrated circuits - reducing power consumption and achieving greater functionality. This cutting-edge resource provides professionals with the conceptual framework and specific strategies for CMSO-SET hybrid circuit design. The book offers a thorough understanding of the pros and cons of digital SETs, and explains how SETs can solve the intrinsic drawbacks of CMOS technology. From the basic physics of single electron transistors and SET modeling, to advanced concepts like CMSO-SET co-integration, the book helps engineers realize significant performance benefits by showing them how to incorporate SET technology into their design projects.
Adrian Mihai Ionescu is head of the Institute of Microelctronics and Microsystems and an associate professor at the Swiss Federal Institute of Technology, Lausanne. He has served in the technical program committee of the IEEE International Electron Device Meeting and the IEEE International Symposium on Quality Electronic Design. He has authored more than 70 research papers. Dr. Ionescu received his Ph.D. in microelectronics from the University Politechnica Bucharest, Romania. Santanu Mahapatra is an assistant professor in the Center for Electronics Design and Technology at the Indian Institute of Science, Bangalore, India. Dr. Mahapatra has published several research papers in international journals and major conferences. He received his Ph.D. from the Swiss Federal Institute of Technology, Lausanne.
Preface. Introduction: CMOS Scaling and Single Electronics. Compact Modeling of Single Electron Transistors. Single Electron Transistor Logic. Hybridization of CMOS and SET. Few Electron Multiple Value Logic and Memory Design. Fabrication of Single Electron Transistors and Compatibility with Silicon CMOS. Appendixes A and B.
| Erscheint lt. Verlag | 1.11.2006 |
|---|---|
| Verlagsort | Norwood |
| Sprache | englisch |
| Themenwelt | Technik ► Elektrotechnik / Energietechnik |
| ISBN-10 | 1-59693-069-1 / 1596930691 |
| ISBN-13 | 978-1-59693-069-8 / 9781596930698 |
| Zustand | Neuware |
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