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Fundamentals of Computer Organization and Architecture - Mostafa Abd-El-Barr, Hesham El-Rewini

Fundamentals of Computer Organization and Architecture

Buch | Hardcover
288 Seiten
2005
Wiley-Interscience (Verlag)
978-0-471-46741-0 (ISBN)
CHF 245,60 inkl. MwSt
Computer architecture deals with the physical configuration, logical structure, formats, protocols, and operational sequences for processing data, controlling the configuration, and controlling the operations over a computer. This book presents fundamentals of computer organization and architecture.
This is the first book in the two-volume set offering comprehensive coverage of the field of computer organization and architecture. This book provides complete coverage of the subjects pertaining to introductory courses in computer organization and architecture, including:
* Instruction set architecture and design
* Assembly language programming
* Computer arithmetic
* Processing unit design
* Memory system design
* Input-output design and organization
* Pipelining design techniques
* Reduced Instruction Set Computers (RISCs)
The authors, who share over 15 years of undergraduate and graduate level instruction in computer architecture, provide real world applications, examples of machines, case studies and practical experiences in each chapter.

MOSTAFA ABD-EL-BARR, PhD, is currently a professor and chairman of the Department of Information Science at Kuwait University. He has co-authored two other books, published more than 120 papers, and served as chair for a number of international conferences and symposia. HESHAM EL-REWINI, PhD, PE, is a full professor and chairman of the Department of Computer Sciences and Engineering at Southern Methodist University (SMU). He has co-authored several books, published numerous research papers in journals and conference proceedings, and chaired many international conferences.

Preface. 1. Introduction to Computer Systems.

1.1. Historical Background.

1.2. Architectural Development & Styles.

1.3. Technological Development.

1.4. Performance Measures.

1.5. Summary.

Exercises.

References and Further Reading.

2. Instruction Set Architecture & Design.

2.1. Memory Locations and Operations.

2.2. Addressing Modes.

2.3. Instruction Types.

2.4. Programming Examples.

2.5. Summary.

Exercises.

References and Further Reading.

3. Assembly Language Programming.

3.1. A Simple Machine.

3.2. Instructions Mnemonics and Syntax.

3.3. Assembler Directives and Commands.

3.4. Assembly and Execution of Programs.

3.5. Example: The X 86 Family.

3.6. Summary.

Exercises.

References and Further Reading.

4. Computer Arithmetic.

4.1. Number Systems.

4.2. Integer Arithmetic.

4.3. Floating Point Arithmetic.

4.4. Summary.

Exercises.

References and Further Readings.

5. Processing Unit Design.

5.1. CPU Basics.

5.2. Register Set.

5.3. Data Path.

5.4. The CPU Instruction Cycle.

5.5. Control Unit.

5.6. Summary.

Exercises.

References.

6. Memory System Design I.

6.1. Basic Concepts.

6.2. Cache Memory.

6.3. Summary.

Exercises.

References and Further Readings.

7. Memory System Design II.

7.1. Main Memory.

7.2. Virtual Memory.

7.3. Read-Only Memory.

7.4. Summary.

Exercises.

References and Further Readings.

8. Input-Output Design and Organization.

8.1. Basic Concepts.

8.2. Programmed I/O.

8.3. Interrupt-Driven I/O.

8.4. Direct Memory Access (DMA).

8.5. Busses.

8.6. Input-Output Interfaces.

8.7. Summary.

Exercises.

References and Further Readings.

9. Pipelining Design Techniques.

9.1. General Concepts.

9.2. Instruction Pipeline.

9.3. Arithmetic pipeline.

9.4. Summary.

Exercises.

References and Further Reading.

10. Reduced Instruction Set Computers (RISCs).

10.1. RISC/CISC Evolution Cycle.

10.2. RISCs Design Principles.

10.3. Overlapped Register Windows.

10.4. RISCs Versus CISCs.

10.5. Pioneer (University) RISC Machines.

10.6. Example of Advanced RISC Machines.

10.7. Summary.

Exercises.

References and Further Readings.

11. Introduction to Multiprocessors.

11.1. Introduction.

11.2. Classification of Computer Architectures.

11.3. SIMD Schemes.

11.4. MIMD Schemes.

11.5. Interconnection Networks.

11.6. Analysis and Performance Metrics.

11. 7. Summary.

Exercises.

References and Further Readings.

Index. 

Erscheint lt. Verlag 7.1.2005
Reihe/Serie The Wiley Series on Parallel and Distributed Computing
Zusatzinfo Drawings: 100 B&W, 0 Color
Sprache englisch
Maße 163 x 239 mm
Gewicht 567 g
Themenwelt Mathematik / Informatik Informatik
Technik Elektrotechnik / Energietechnik
ISBN-10 0-471-46741-3 / 0471467413
ISBN-13 978-0-471-46741-0 / 9780471467410
Zustand Neuware
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