High-Speed Clock Network Design

Qing K. Zhu (Autor)

Buch | Hardcover

188 Seiten

2002
Springer-Verlag New York Inc.
978-1-4020-7346-5 (ISBN)

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High-Speed Clock Network Design is a collection of design concepts, techniques and research works from the author for clock distribution in microprocessors and high-performance chips. It is organized in 11 chapters.

1 Introduction.- 2 Overview to Timing Constraints.- 3 Sequential Clocked Elements.- 4 Design Methodology for Domino Circuits.- 5 Clock Generation and De-Skewing.- 6 Microprocessor Clock Distribution Examples.- 7 Clock Network Simulation Methods.- 8 Low-Voltage Swing Clock Distribution.- 9 Routing Clock on Package.- 10 Balanced Clock Routing Algorithms.- 11 Clock Tree Design Flow in Asic.- Reference.

Erscheint lt. Verlag	31.12.2002
Zusatzinfo	VIII, 188 p.
Verlagsort	New York, NY
Sprache	englisch
Maße	156 x 234 mm
Themenwelt	Mathematik / Informatik ► Informatik ► Theorie / Studium
	Informatik ► Weitere Themen ► CAD-Programme
	Technik ► Elektrotechnik / Energietechnik
ISBN-10	1-4020-7346-1 / 1402073461
ISBN-13	978-1-4020-7346-5 / 9781402073465
Zustand	Neuware